static const int32_t hwcaps[] = {
SR_CONF_LOGIC_ANALYZER,
SR_CONF_SAMPLERATE,
- SR_CONF_TRIGGER_TYPE,
+ SR_CONF_TRIGGER_MATCH,
SR_CONF_CAPTURE_RATIO,
SR_CONF_LIMIT_SAMPLES,
SR_CONF_EXTERNAL_CLOCK,
SR_CONF_RLE,
};
+static const int32_t trigger_matches[] = {
+ SR_TRIGGER_ZERO,
+ SR_TRIGGER_ONE,
+};
+
#define STR_PATTERN_NONE "None"
#define STR_PATTERN_EXTERNAL "External"
#define STR_PATTERN_INTERNAL "Internal"
STR_PATTERN_INTERNAL,
};
-/* Probes are numbered 0-31 (on the PCB silkscreen). */
-SR_PRIV const char *ols_probe_names[NUM_PROBES + 1] = {
+/* Channels are numbered 0-31 (on the PCB silkscreen). */
+SR_PRIV const char *ols_channel_names[NUM_CHANNELS + 1] = {
"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
"24", "25", "26", "27", "28", "29", "30", "31",
SR_PRIV struct sr_dev_driver ols_driver_info;
static struct sr_dev_driver *di = &ols_driver_info;
-static int dev_clear(void)
-{
- return std_dev_clear(di, NULL);
-}
-
static int init(struct sr_context *sr_ctx)
{
return std_init(sr_ctx, di, LOG_PREFIX);
struct sr_dev_inst *sdi;
struct drv_context *drvc;
struct dev_context *devc;
- struct sr_probe *probe;
+ struct sr_channel *ch;
struct sr_serial_dev_inst *serial;
GPollFD probefd;
GSList *l, *devices;
"Sump", "Logic Analyzer", "v1.0");
sdi->driver = di;
for (i = 0; i < 32; i++) {
- if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
- ols_probe_names[i])))
+ if (!(ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE,
+ ols_channel_names[i])))
return 0;
- sdi->probes = g_slist_append(sdi->probes, probe);
+ sdi->channels = g_slist_append(sdi->channels, ch);
}
devc = ols_dev_new();
sdi->priv = devc;
if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
sr_dbg("Failed to set default samplerate (%"PRIu64").",
DEFAULT_SAMPLERATE);
- /* Clear trigger masks, values and stages. */
- ols_configure_probes(sdi);
sdi->inst_type = SR_INST_SERIAL;
sdi->conn = serial;
static int cleanup(void)
{
- return dev_clear();
+ return std_dev_clear(di, NULL);
}
static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
- const struct sr_probe_group *probe_group)
+ const struct sr_channel_group *cg)
{
struct dev_context *devc;
- (void)probe_group;
+ (void)cg;
if (!sdi)
return SR_ERR_ARG;
}
static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
- const struct sr_probe_group *probe_group)
+ const struct sr_channel_group *cg)
{
struct dev_context *devc;
uint16_t flag;
int ret;
const char *stropt;
- (void)probe_group;
+ (void)cg;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
case SR_CONF_SWAP:
if (g_variant_get_boolean(data)) {
sr_info("Enabling channel swapping.");
- devc->flag_reg |= FLAG_SWAP_PROBES;
+ devc->flag_reg |= FLAG_SWAP_CHANNELS;
} else {
sr_info("Disabling channel swapping.");
- devc->flag_reg &= ~FLAG_SWAP_PROBES;
+ devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
}
ret = SR_OK;
break;
}
static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
- const struct sr_probe_group *probe_group)
+ const struct sr_channel_group *cg)
{
struct dev_context *devc;
GVariant *gvar, *grange[2];
GVariantBuilder gvb;
- int num_channels, i;
+ int num_ols_changrp, i;
- (void)probe_group;
+ (void)cg;
switch (key) {
case SR_CONF_SCAN_OPTIONS:
g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
*data = g_variant_builder_end(&gvb);
break;
- case SR_CONF_TRIGGER_TYPE:
- *data = g_variant_new_string(TRIGGER_TYPE);
+ case SR_CONF_TRIGGER_MATCH:
+ *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
+ trigger_matches, ARRAY_SIZE(trigger_matches),
+ sizeof(int32_t));
break;
case SR_CONF_PATTERN_MODE:
*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
/* Device didn't specify sample memory size in metadata. */
return SR_ERR_NA;
/*
- * Channel groups are turned off if no probes in that group are
+ * Channel groups are turned off if no channels in that group are
* enabled, making more room for samples for the enabled group.
*/
- ols_configure_probes(sdi);
- num_channels = 0;
+ ols_channel_mask(sdi);
+ num_ols_changrp = 0;
for (i = 0; i < 4; i++) {
- if (devc->probe_mask & (0xff << (i * 8)))
- num_channels++;
+ if (devc->channel_mask & (0xff << (i * 8)))
+ num_ols_changrp++;
}
grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
- grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
+ if (num_ols_changrp)
+ grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
+ else
+ grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
*data = g_variant_new_tuple(grange, 2);
break;
default:
struct dev_context *devc;
struct sr_serial_dev_inst *serial;
uint16_t samplecount, readcount, delaycount;
- uint8_t changrp_mask, arg[4];
- int num_channels;
+ uint8_t ols_changrp_mask, arg[4];
+ int num_ols_changrp;
int ret, i;
if (sdi->status != SR_ST_ACTIVE)
devc = sdi->priv;
serial = sdi->conn;
- if (ols_configure_probes(sdi) != SR_OK) {
- sr_err("Failed to configure probes.");
- return SR_ERR;
- }
+ ols_channel_mask(sdi);
- /*
- * Enable/disable channel groups in the flag register according to the
- * probe mask. Calculate this here, because num_channels is needed
- * to limit readcount.
- */
- changrp_mask = 0;
- num_channels = 0;
+ num_ols_changrp = 0;
+ ols_changrp_mask = 0;
for (i = 0; i < 4; i++) {
- if (devc->probe_mask & (0xff << (i * 8))) {
- changrp_mask |= (1 << i);
- num_channels++;
+ if (devc->channel_mask & (0xff << (i * 8))) {
+ ols_changrp_mask |= (1 << i);
+ num_ols_changrp++;
}
}
* Limit readcount to prevent reading past the end of the hardware
* buffer.
*/
- samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
+ samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
readcount = samplecount / 4;
/* Rather read too many samples than too few. */
readcount++;
/* Basic triggers. */
- if (devc->trigger_mask[0] != 0x00000000) {
- /* At least one probe has a trigger on it. */
+ if (ols_convert_trigger(sdi) != SR_OK) {
+ sr_err("Failed to configure channels.");
+ return SR_ERR;
+ }
+ if (devc->num_stages > 0) {
delaycount = readcount * (1 - devc->capture_ratio / 100.0);
devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
for (i = 0; i <= devc->num_stages; i++) {
- sr_dbg("Setting stage %d trigger.", i);
+ sr_dbg("Setting OLS stage %d trigger.", i);
if ((ret = set_trigger(sdi, i)) != SR_OK)
return ret;
}
devc->flag_reg & FLAG_RLE ? "on" : "off",
devc->flag_reg & FLAG_FILTER ? "on": "off",
devc->flag_reg & FLAG_DEMUX ? "on" : "off");
- /* 1 means "disable channel". */
- devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
+ /*
+ * Enable/disable OLS channel groups in the flag register according
+ * to the channel mask. 1 means "disable channel".
+ */
+ devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
arg[0] = devc->flag_reg & 0xff;
arg[1] = devc->flag_reg >> 8;
arg[2] = arg[3] = 0x00;
.cleanup = cleanup,
.scan = scan,
.dev_list = dev_list,
- .dev_clear = dev_clear,
+ .dev_clear = NULL,
.config_get = config_get,
.config_set = config_set,
.config_list = config_list,