* This file is part of the sigrok project.
*
* Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com>
+ * Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <arpa/inet.h>
#include "sigrok.h"
#include "sigrok-internal.h"
-#include "config.h"
#include "link-mso19.h"
#define USB_VENDOR "3195"
struct mso *mso = sdi->priv;
uint16_t ops[2];
- ops[0] = mso_trans(REG_CTL, (mso->ctlbase | BIT_CTL_RESETADC));
- ops[1] = mso_trans(REG_CTL, mso->ctlbase);
- mso->ctlbase |= BIT_CTL_ADC_UNKNOWN4;
+ ops[0] = mso_trans(REG_CTL1, (mso->ctlbase1 | BIT_CTL1_RESETADC));
+ ops[1] = mso_trans(REG_CTL1, mso->ctlbase1);
+ mso->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
+ sr_dbg("Requesting ADC reset");
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
struct mso *mso = sdi->priv;
uint16_t ops[1];
- mso->ctlbase |= BIT_CTL_RESETFSM;
- ops[0] = mso_trans(REG_CTL, mso->ctlbase);
+ mso->ctlbase1 |= BIT_CTL1_RESETFSM;
+ ops[0] = mso_trans(REG_CTL1, mso->ctlbase1);
+ sr_dbg("Requesting ADC reset");
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
struct mso *mso = sdi->priv;
uint16_t ops[1];
- mso->ctlbase &= BIT_CTL_LED;
+ mso->ctlbase1 &= ~BIT_CTL1_LED;
if (state)
- mso->ctlbase |= BIT_CTL_LED;
- ops[0] = mso_trans(REG_CTL, mso->ctlbase);
+ mso->ctlbase1 |= BIT_CTL1_LED;
+ ops[0] = mso_trans(REG_CTL1, mso->ctlbase1);
+ sr_dbg("Requesting LED toggle");
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
char buf[1];
int ret;
+ sr_dbg("Requesting trigger state");
ret = mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
if (info == NULL || ret != SR_OK)
return ret;
ret = SR_ERR;
*info = buf[0];
+ sr_dbg("Trigger state is: 0x%x", *info);
return ret;
}
{
uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
+ sr_dbg("Requesting buffer dump");
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
{
struct mso *mso = sdi->priv;
uint16_t ops[] = {
- mso_trans(REG_CTL, mso->ctlbase | BIT_CTL_RESETFSM),
- mso_trans(REG_CTL, mso->ctlbase | BIT_CTL_ARM),
- mso_trans(REG_CTL, mso->ctlbase),
+ mso_trans(REG_CTL1, mso->ctlbase1 | BIT_CTL1_RESETFSM),
+ mso_trans(REG_CTL1, mso->ctlbase1 | BIT_CTL1_ARM),
+ mso_trans(REG_CTL1, mso->ctlbase1),
};
+ sr_dbg("Requesting trigger arm");
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
{
struct mso *mso = sdi->priv;
uint16_t ops[] = {
- mso_trans(REG_CTL, mso->ctlbase | 8),
- mso_trans(REG_CTL, mso->ctlbase),
+ mso_trans(REG_CTL1, mso->ctlbase1 | 8),
+ mso_trans(REG_CTL1, mso->ctlbase1),
};
+ sr_dbg("Requesting forced capture");
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
uint16_t ops[] = {
mso_trans(REG_DAC1, (val >> 8) & 0xff),
mso_trans(REG_DAC2, val & 0xff),
- mso_trans(REG_CTL, mso->ctlbase | BIT_CTL_RESETADC),
+ mso_trans(REG_CTL1, mso->ctlbase1 | BIT_CTL1_RESETADC),
};
+ sr_dbg("Setting dac word to 0x%x", val);
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
mso_trans(REG_CLKRATE2, val & 0xff),
};
+ sr_dbg("Setting clkrate word to 0x%x", val);
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
if (rate_map[i].rate == rate) {
- mso->slowmode = rate_map[i].slowmode;
+ mso->ctlbase2 = rate_map[i].slowmode;
ret = mso_clkrate_out(sdi, rate_map[i].val);
if (ret == SR_OK)
mso->cur_rate = rate;
ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
ops[4] = mso_trans(11,
mso->dso_trigger_width / SR_HZ_TO_NS(mso->cur_rate));
- ops[5] = mso_trans(15, (2 | mso->slowmode));
-
- /* FIXME SPI/I2C Triggers */
- ops[6] = mso_trans(0, 0);
- ops[7] = mso_trans(1, 0);
- ops[8] = mso_trans(2, 0);
- ops[9] = mso_trans(3, 0);
- ops[10] = mso_trans(4, 0xff);
- ops[11] = mso_trans(5, 0xff);
- ops[12] = mso_trans(6, 0xff);
- ops[13] = mso_trans(7, 0xff);
- ops[14] = mso_trans(8, mso->trigger_spimode);
- ops[15] = mso_trans(15, mso->slowmode);
+
+ /* Select the SPI/I2C trigger config bank */
+ ops[5] = mso_trans(REG_CTL2, (mso->ctlbase2 | BITS_CTL2_BANK(2)));
+ /* Configure the SPI/I2C protocol trigger */
+ ops[6] = mso_trans(REG_PT_WORD(0), mso->protocol_trigger.word[0]);
+ ops[7] = mso_trans(REG_PT_WORD(1), mso->protocol_trigger.word[1]);
+ ops[8] = mso_trans(REG_PT_WORD(2), mso->protocol_trigger.word[2]);
+ ops[9] = mso_trans(REG_PT_WORD(3), mso->protocol_trigger.word[3]);
+ ops[10] = mso_trans(REG_PT_MASK(0), mso->protocol_trigger.mask[0]);
+ ops[11] = mso_trans(REG_PT_MASK(1), mso->protocol_trigger.mask[1]);
+ ops[12] = mso_trans(REG_PT_MASK(2), mso->protocol_trigger.mask[2]);
+ ops[13] = mso_trans(REG_PT_MASK(3), mso->protocol_trigger.mask[3]);
+ ops[14] = mso_trans(REG_PT_SPIMODE, mso->protocol_trigger.spimode);
+ /* Select the default config bank */
+ ops[15] = mso_trans(REG_CTL2, mso->ctlbase2);
return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
}
strncpy(product, iProduct, s);
product[s] = 0;
strcpy(manufacturer, iProduct + s);
- sprintf(hwrev, "r%d", mso->hwrev);
if (!(mso = g_try_malloc0(sizeof(struct mso)))) {
sr_err("mso19: %s: mso malloc failed", __func__);
sr_warn("Invalid iSerial: %s", iSerial);
goto err_free_mso;
}
+ sprintf(hwrev, "r%d", mso->hwrev);
+
/* hardware initial state */
- mso->ctlbase = 0;
+ mso->ctlbase1 = 0;
+ {
+ /* Initialize the protocol trigger configuration */
+ int i;
+ for (i = 0; i < 4; i++)
+ {
+ mso->protocol_trigger.word[i] = 0;
+ mso->protocol_trigger.mask[i] = 0xff;
+ }
+ mso->protocol_trigger.spimode = 0;
+ }
sdi = sr_device_instance_new(devcnt, SR_ST_INITIALIZING,
manufacturer, product, hwrev);
if (sdi->serial->fd != -1)
serial_close(sdi->serial->fd);
if (sdi->priv != NULL)
+ {
free(sdi->priv);
+ sdi->priv = NULL;
+ }
sr_device_instance_free(sdi);
}
g_slist_free(device_instances);
/* FIXME: discard serial buffer */
mso_check_trigger(sdi, &mso->trigger_state);
-// sr_warn("trigger state: %c", mso->trigger_state);
+ sr_dbg("trigger state: 0x%x", mso->trigger_state);
ret = mso_reset_adc(sdi);
if (ret != SR_OK)
return ret;
mso_check_trigger(sdi, &mso->trigger_state);
-// sr_warn("trigger state: %c", mso->trigger_state);
+ sr_dbg("trigger state: 0x%x", mso->trigger_state);
// ret = mso_reset_fsm(sdi);
// if (ret != SR_OK)
// return ret;
+ sr_dbg("Finished %s", __func__);
+
// return SR_ERR;
return SR_OK;
}
sdi->status = SR_ST_INACTIVE;
}
+ sr_dbg("finished %s", __func__);
return SR_OK;
}
struct sr_device_instance *sdi = user_data;
struct mso *mso = sdi->priv;
struct sr_datafeed_packet packet;
+ struct sr_datafeed_logic logic;
uint8_t in[1024], logic_out[1024];
double analog_out[1024];
size_t i, s;
}
packet.type = SR_DF_LOGIC;
- packet.length = 1024;
- packet.unitsize = 1;
- packet.payload = logic_out;
+ packet.payload = &logic;
+ logic.length = 1024;
+ logic.unitsize = 1;
+ logic.data = logic_out;
sr_session_bus(mso->session_id, &packet);
-
+ // Dont bother fixing this yet, keep it "old style"
+ /*
packet.type = SR_DF_ANALOG;
packet.length = 1024;
packet.unitsize = sizeof(double);
packet.payload = analog_out;
sr_session_bus(mso->session_id, &packet);
+ */
packet.type = SR_DF_END;
sr_session_bus(mso->session_id, &packet);
// return ret;
/* FIXME: ACDC Mode */
- mso->ctlbase &= 0x7f;
-// mso->ctlbase |= mso->acdcmode;
+ mso->ctlbase1 &= 0x7f;
+// mso->ctlbase1 |= mso->acdcmode;
ret = mso_configure_rate(sdi, mso->cur_rate);
if (ret != SR_OK)
sr_source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, sdi);
packet.type = SR_DF_HEADER;
- packet.length = sizeof(struct sr_datafeed_header);
packet.payload = (unsigned char *) &header;
header.feed_version = 1;
gettimeofday(&header.starttime, NULL);
header.samplerate = mso->cur_rate;
header.num_analog_probes = 1;
header.num_logic_probes = 8;
- header.protocol_id = SR_PROTO_RAW;
sr_session_bus(session_device_id, &packet);
return ret;
sr_session_bus(session_device_id, &packet);
}
-struct sr_device_plugin link_mso19_plugin_info = {
+SR_PRIV struct sr_device_plugin link_mso19_plugin_info = {
.name = "link-mso19",
.longname = "Link Instruments MSO-19",
.api_version = 1,
projects / libsigrok.git / blobdiff