#ifndef LIBSIGROK_HARDWARE_HANTEK_DSO_H
#define LIBSIGROK_HARDWARE_HANTEK_DSO_H
-#define USB_INTERFACE 0
-#define USB_CONFIGURATION 1
-#define DSO_EP_IN 0x86
-#define DSO_EP_OUT 0x02
+/* Message logging helpers with driver-specific prefix string. */
+#define DRIVER_LOG_DOMAIN "hantek-dso: "
+#define sr_log(l, s, args...) sr_log(l, DRIVER_LOG_DOMAIN s, ## args)
+#define sr_spew(s, args...) sr_spew(DRIVER_LOG_DOMAIN s, ## args)
+#define sr_dbg(s, args...) sr_dbg(DRIVER_LOG_DOMAIN s, ## args)
+#define sr_info(s, args...) sr_info(DRIVER_LOG_DOMAIN s, ## args)
+#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
+#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
+
+#define USB_INTERFACE 0
+#define USB_CONFIGURATION 1
+#define DSO_EP_IN 0x86
+#define DSO_EP_OUT 0x02
/* FX2 renumeration delay in ms */
-#define MAX_RENUM_DELAY 3000
+#define MAX_RENUM_DELAY_MS 3000
-#define MAX_CAPTURE_EMPTY 3
+#define MAX_CAPTURE_EMPTY 3
-#define DEFAULT_VOLTAGE VOLTAGE_2V
-#define DEFAULT_FRAMESIZE FRAMESIZE_SMALL
-#define DEFAULT_TIMEBASE TIME_1ms
-#define DEFAULT_TRIGGER_SOURCE TRIGGER_CH1
-#define DEFAULT_COUPLING COUPLING_AC
-/* Halfway between min and max = 0V */
-#define DEFAULT_HORIZ_TRIGGERPOS 0x1400
+#define DEFAULT_VOLTAGE VDIV_500MV
+#define DEFAULT_FRAMESIZE FRAMESIZE_SMALL
+#define DEFAULT_TIMEBASE TIME_100us
+#define DEFAULT_TRIGGER_SOURCE "CH1"
+#define DEFAULT_COUPLING COUPLING_DC
+#define DEFAULT_HORIZ_TRIGGERPOS 0.5
+#define DEFAULT_VERT_OFFSET 0.5
+#define DEFAULT_VERT_TRIGGERPOS 0.5
-#define DEFAULT_VERT_OFFSET 0.5
-#define DEFAULT_VERT_TRIGGERPOS 0.0
-
-#define MAX_VERT_TRIGGER 0xfe
+#define MAX_VERT_TRIGGER 0xfe
/* Hantek DSO-specific protocol values */
-#define EEPROM_CHANNEL_OFFSETS 0x08
-
-#define FRAMESIZE_SMALL 10240
-#define FRAMESIZE_LARGE 32768
+#define EEPROM_CHANNEL_OFFSETS 0x08
+#define FRAMESIZE_SMALL 10240
+#define FRAMESIZE_LARGE 32768
enum control_requests {
CTRL_READ_EEPROM = 0xa2,
CTRL_GETSPEED = 0xb2,
CTRL_BEGINCOMMAND = 0xb3,
CTRL_SETOFFSET = 0xb4,
- CTRL_SETRELAYS = 0xb5
+ CTRL_SETRELAYS = 0xb5,
};
enum dso_commands {
CMD_GET_CHANNELDATA,
CMD_GET_CAPTURESTATE,
CMD_SET_VOLTAGE,
+ /* unused */
cmdSetLogicalData,
- cmdGetLogicalData
-};
-
-enum voltages {
- VOLTAGE_5V = 0,
- VOLTAGE_2V,
- VOLTAGE_1V,
- VOLTAGE_500mV,
- VOLTAGE_200mV,
- VOLTAGE_100mV,
- VOLTAGE_50mV,
- VOLTAGE_20mV,
- VOLTAGE_10mV
+ cmdGetLogicalData,
};
+/* Must match the coupling table. */
enum couplings {
COUPLING_AC = 0,
COUPLING_DC,
- COUPLING_OFF
+ /* TODO not used, how to enable? */
+ COUPLING_GND,
};
+/* Must match the timebases table. */
enum time_bases {
TIME_10us = 0,
TIME_20us,
TIME_40ms,
TIME_100ms,
TIME_200ms,
- TIME_400ms
+ TIME_400ms,
+};
+
+/* Must match the vdivs table. */
+enum {
+ VDIV_10MV,
+ VDIV_20MV,
+ VDIV_50MV,
+ VDIV_100MV,
+ VDIV_200MV,
+ VDIV_500MV,
+ VDIV_1V,
+ VDIV_2V,
+ VDIV_5V,
};
enum trigger_slopes {
SLOPE_POSITIVE = 0,
- SLOPE_NEGATIVE
+ SLOPE_NEGATIVE,
};
enum trigger_sources {
TRIGGER_CH2 = 0,
TRIGGER_CH1,
- TRIGGER_ALT,
TRIGGER_EXT,
- TRIGGER_EXT10
};
enum capturestates {
CAPTURE_READY_8BIT = 2,
CAPTURE_READY_9BIT = 7,
CAPTURE_TIMEOUT = 127,
- CAPTURE_UNKNOWN = 255
+ CAPTURE_UNKNOWN = 255,
};
enum triggermodes {
TRIGGERMODE_AUTO,
TRIGGERMODE_NORMAL,
- TRIGGERMODE_SINGLE
+ TRIGGERMODE_SINGLE,
};
enum states {
IDLE,
NEW_CAPTURE,
CAPTURE,
- FETCH_DATA
+ FETCH_DATA,
+ STOPPING,
};
struct dso_profile {
uint16_t fw_pid;
char *vendor;
char *model;
- char *model_version;
- int num_probes;
char *firmware;
};
-struct context {
- struct dso_profile *profile;
+struct dev_context {
+ const struct dso_profile *profile;
struct sr_usb_dev_inst *usb;
void *cb_data;
uint64_t limit_frames;
uint64_t num_frames;
+ GSList *enabled_probes;
/* We can't keep track of an FX2-based device after upgrading
* the firmware (it re-enumerates into a different device address
* after the upgrade) this is like a global lock. No device will open
* until a proper delay after the last device was upgraded.
*/
- GTimeVal fw_updated;
+ int64_t fw_updated;
int epin_maxpacketsize;
int capture_empty_count;
- int current_transfer;
int dev_state;
+ /* Oscilloscope settings. */
int timebase;
gboolean ch1_enabled;
gboolean ch2_enabled;
float voffset_ch2;
float voffset_trigger;
uint16_t channel_levels[2][9][2];
- int framesize;
+ unsigned int framesize;
gboolean filter_ch1;
gboolean filter_ch2;
gboolean filter_trigger;
int triggerslope;
- int triggersource;
- int triggerposition;
+ char *triggersource;
+ float triggerposition;
int triggermode;
+
+ /* Frame transfer */
+ unsigned int samp_received;
+ unsigned int samp_buffered;
+ unsigned int trigger_offset;
+ unsigned char *framebuf;
};
-SR_PRIV int dso_open(int dev_index);
+SR_PRIV int dso_open(struct sr_dev_inst *sdi);
SR_PRIV void dso_close(struct sr_dev_inst *sdi);
-SR_PRIV int dso_enable_trigger(struct context *ctx);
-SR_PRIV int dso_force_trigger(struct context *ctx);
-SR_PRIV int dso_init(struct context *ctx);
-SR_PRIV uint8_t dso_get_capturestate(struct context *ctx);
-SR_PRIV uint8_t dso_capture_start(struct context *ctx);
-SR_PRIV int dso_get_channeldata(struct context *ctx, libusb_transfer_cb_fn cb);
+SR_PRIV int dso_enable_trigger(struct dev_context *devc);
+SR_PRIV int dso_force_trigger(struct dev_context *devc);
+SR_PRIV int dso_init(struct dev_context *devc);
+SR_PRIV int dso_get_capturestate(struct dev_context *devc,
+ uint8_t *capturestate, uint32_t *trigger_offset);
+SR_PRIV int dso_capture_start(struct dev_context *devc);
+SR_PRIV int dso_get_channeldata(const struct sr_dev_inst *sdi,
+ libusb_transfer_cb_fn cb);
#endif