]> sigrok.org Git - libsigrok.git/blobdiff - hardware/hantek-dso/dso.c
hantek-dso: fix CH2 vdiv setting
[libsigrok.git] / hardware / hantek-dso / dso.c
index aa5fe239051b9bce606e1d2a23ffe1c2ad604ed8..8c6a6000f1a0776d2a5fa3db9e8d337124795c6e 100644 (file)
@@ -26,6 +26,7 @@
 #include <string.h>
 #include <glib.h>
 #include <libusb.h>
+#include <arpa/inet.h>
 
 extern libusb_context *usb_context;
 extern GSList *dev_insts;
@@ -200,7 +201,8 @@ SR_PRIV void dso_close(struct sr_dev_inst *sdi)
 
 static int get_channel_offsets(struct context *ctx)
 {
-       int ret;
+       GString *gs;
+       int chan, v, ret;
 
        sr_dbg("hantek-dso: getting channel offsets");
 
@@ -214,6 +216,32 @@ static int get_channel_offsets(struct context *ctx)
                return SR_ERR;
        }
 
+       /* Comes in as 16-bit numbers with the second byte always 0 on
+        * the DSO-2090. Guessing this is supposed to be big-endian,
+        * since that's how voltage offsets are submitted back to the DSO.
+        * Convert to host order now, so we can use them natively.
+        */
+       for (chan = 0; chan < 2; chan++) {
+               for (v = 0; v < 9; v++) {
+                       ctx->channel_levels[chan][v][0] = ntohs(ctx->channel_levels[chan][v][0]);
+                       ctx->channel_levels[chan][v][1] = ntohs(ctx->channel_levels[chan][v][1]);
+               }
+       }
+
+       if (sr_log_loglevel_get() >= SR_LOG_DBG) {
+               gs = g_string_sized_new(128);
+               for (chan = 0; chan < 2; chan++) {
+                       g_string_printf(gs, "hantek-dso: CH%d:", chan + 1);
+                       for (v = 0; v < 9; v++) {
+                               g_string_append_printf(gs, " %.4x-%.4x",
+                                               ctx->channel_levels[chan][v][0],
+                                               ctx->channel_levels[chan][v][1]);
+                       }
+                       sr_dbg(gs->str);
+               }
+               g_string_free(gs, TRUE);
+       }
+
        return SR_OK;
 }
 
@@ -338,17 +366,24 @@ SR_PRIV int dso_set_filters(struct context *ctx)
        int ret, tmp;
        uint8_t cmdstring[8];
 
-       sr_dbg("hantek-dso: sending CMD_SET_FILTERS");
+       sr_dbg("hantek-dso: preparing CMD_SET_FILTERS");
 
        memset(cmdstring, 0, sizeof(cmdstring));
        cmdstring[0] = CMD_SET_FILTERS;
        cmdstring[1] = 0x0f;
-       if (ctx->filter_ch1)
+       if (ctx->filter_ch1) {
+               sr_dbg("hantek-dso: turning on CH1 filter");
                cmdstring[2] |= 0x80;
-       if (ctx->filter_ch2)
+       }
+       if (ctx->filter_ch2) {
+               sr_dbg("hantek-dso: turning on CH2 filter");
                cmdstring[2] |= 0x40;
-       if (ctx->filter_trigger)
+       }
+       if (ctx->filter_trigger) {
+               /* TODO: supported on the DSO-2090? */
+               sr_dbg("hantek-dso: turning on trigger filter");
                cmdstring[2] |= 0x20;
+       }
 
        if (send_begin(ctx) != SR_OK)
                return SR_ERR;
@@ -360,6 +395,7 @@ SR_PRIV int dso_set_filters(struct context *ctx)
                sr_err("Failed to set filters: %d", ret);
                return SR_ERR;
        }
+       sr_dbg("hantek-dso: sent CMD_SET_FILTERS");
 
        return SR_OK;
 }
@@ -369,15 +405,52 @@ SR_PRIV int dso_set_voltage(struct context *ctx)
        int ret, tmp;
        uint8_t cmdstring[8];
 
-       sr_dbg("hantek-dso: sending CMD_SET_VOLTAGE");
+       sr_dbg("hantek-dso: preparing CMD_SET_VOLTAGE");
 
        memset(cmdstring, 0, sizeof(cmdstring));
        cmdstring[0] = CMD_SET_VOLTAGE;
        cmdstring[1] = 0x0f;
-       cmdstring[2] = 0x03;
-       cmdstring[2] |= ((2 - ctx->voltage_ch1 % 3) << 6);
-       cmdstring[2] |= ((2 - ctx->voltage_ch2 % 3) << 4);
-cmdstring[2] = 0x30;
+       cmdstring[2] = 0x30;
+
+       /* CH1 volts/div is encoded in bits 0-1 */
+       sr_dbg("hantek-dso: CH1 vdiv index %d", ctx->voltage_ch1);
+       switch (ctx->voltage_ch1) {
+       case VDIV_1V:
+       case VDIV_100MV:
+       case VDIV_10MV:
+               cmdstring[2] |= 0x00;
+               break;
+       case VDIV_2V:
+       case VDIV_200MV:
+       case VDIV_20MV:
+               cmdstring[2] |= 0x01;
+               break;
+       case VDIV_5V:
+       case VDIV_500MV:
+       case VDIV_50MV:
+               cmdstring[2] |= 0x02;
+               break;
+       }
+
+       /* CH2 volts/div is encoded in bits 2-3 */
+       sr_dbg("hantek-dso: CH2 vdiv index %d", ctx->voltage_ch2);
+       switch (ctx->voltage_ch2) {
+       case VDIV_1V:
+       case VDIV_100MV:
+       case VDIV_10MV:
+               cmdstring[2] |= 0x00;
+               break;
+       case VDIV_2V:
+       case VDIV_200MV:
+       case VDIV_20MV:
+               cmdstring[2] |= 0x04;
+               break;
+       case VDIV_5V:
+       case VDIV_500MV:
+       case VDIV_50MV:
+               cmdstring[2] |= 0x08;
+               break;
+       }
 
        if (send_begin(ctx) != SR_OK)
                return SR_ERR;
@@ -389,6 +462,7 @@ cmdstring[2] = 0x30;
                sr_err("Failed to set voltage: %d", ret);
                return SR_ERR;
        }
+       sr_dbg("hantek-dso: sent CMD_SET_VOLTAGE");
 
        return SR_OK;
 }
@@ -399,17 +473,18 @@ SR_PRIV int dso_set_relays(struct context *ctx)
        uint8_t relays[] = { 0x00, 0x04, 0x08, 0x02, 0x20, 0x40, 0x10, 0x01,
                        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
 
-       sr_dbg("hantek-dso: sending CTRL_SETRELAYS");
+       sr_dbg("hantek-dso: preparing CTRL_SETRELAYS");
 
        cv1 = ctx->voltage_ch1 / 3;
        cv2 = ctx->voltage_ch2 / 3;
-relays[0] = 0x01;
+
        if (cv1 > 0)
                relays[1] = ~relays[1];
 
        if (cv1 > 1)
                relays[2] = ~relays[2];
 
+       sr_dbg("hantek-dso: CH1 coupling %d", ctx->coupling_ch1);
        if (ctx->coupling_ch1 != COUPLING_AC)
                relays[3] = ~relays[3];
 
@@ -419,6 +494,7 @@ relays[0] = 0x01;
        if (cv2 > 1)
                relays[5] = ~relays[5];
 
+       sr_dbg("hantek-dso: CH2 coupling %d", ctx->coupling_ch1);
        if (ctx->coupling_ch2 != COUPLING_AC)
                relays[6] = ~relays[6];
 
@@ -431,6 +507,7 @@ relays[0] = 0x01;
                sr_err("failed to set relays: %d", ret);
                return SR_ERR;
        }
+       sr_dbg("hantek-dso: sent CTRL_SETRELAYS");
 
        return SR_OK;
 }
@@ -439,31 +516,33 @@ SR_PRIV int dso_set_voffsets(struct context *ctx)
 {
        int offset, ret;
        uint16_t *ch_levels;
-//     uint8_t offsets[17];
-uint8_t offsets[] = {0x20,0x75,0x30,0x3f,0x20,0xbd,0x3f,0x02,0x20,0x00,0x71,0x01,0x2e,0x0b,0x3f,0x02,0x50};
-//uint8_t offsets[] = {0xff, 0x75, 0x30, 0x3f, 0x20, 0xbd,
-//             0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-//};
-
-       sr_dbg("hantek-dso: sending CTRL_SETOFFSET");
-
-//     memset(offsets, 0, sizeof(offsets));
-//     /* Channel 1 */
-//     ch_levels = ctx->channel_levels[0][VOLTAGE_10mV - ctx->voltage_ch1];
-//     offset = (ch_levels[1] - ch_levels[0]) * ctx->voffset_ch1 + ch_levels[0];
-//     offsets[0] = (offset >> 8) | 0x20;
-//     offsets[1] = offset & 0xff;
-//
-//     /* Channel 2 */
-//     ch_levels = ctx->channel_levels[1][VOLTAGE_10mV - ctx->voltage_ch2];
-//     offset = (ch_levels[1] - ch_levels[0]) * ctx->voffset_ch2 + ch_levels[0];
-//     offsets[2] = (offset >> 8) | 0x20;
-//     offsets[3] = offset & 0xff;
-//
-//     /* Trigger */
-//     offset = MAX_VERT_TRIGGER * ctx->voffset_trigger;
-//     offsets[4] = (offset >> 8) | 0x20;
-//     offsets[5] = offset & 0xff;
+       uint8_t offsets[17];
+
+       sr_dbg("hantek-dso: preparing CTRL_SETOFFSET");
+
+       memset(offsets, 0, sizeof(offsets));
+       /* Channel 1 */
+       ch_levels = ctx->channel_levels[0][ctx->voltage_ch1];
+       offset = (ch_levels[1] - ch_levels[0]) * ctx->voffset_ch1 + ch_levels[0];
+       offsets[0] = (offset >> 8) | 0x20;
+       offsets[1] = offset & 0xff;
+       sr_dbg("hantek-dso: CH1 offset %3.2f (%.2x%.2x)", ctx->voffset_ch1,
+                       offsets[0], offsets[1]);
+
+       /* Channel 2 */
+       ch_levels = ctx->channel_levels[1][ctx->voltage_ch2];
+       offset = (ch_levels[1] - ch_levels[0]) * ctx->voffset_ch2 + ch_levels[0];
+       offsets[2] = (offset >> 8) | 0x20;
+       offsets[3] = offset & 0xff;
+       sr_dbg("hantek-dso: CH2 offset %3.2f (%.2x%.2x)", ctx->voffset_ch2,
+                       offsets[2], offsets[3]);
+
+       /* Trigger */
+       offset = MAX_VERT_TRIGGER * ctx->voffset_trigger;
+       offsets[4] = (offset >> 8) | 0x20;
+       offsets[5] = offset & 0xff;
+       sr_dbg("hantek-dso: trigger offset %3.2f (%.2x%.2x)", ctx->voffset_trigger,
+                       offsets[4], offsets[5]);
 
        if ((ret = libusb_control_transfer(ctx->usb->devhdl,
                        LIBUSB_REQUEST_TYPE_VENDOR, CTRL_SETOFFSET,
@@ -471,6 +550,7 @@ uint8_t offsets[] = {0x20,0x75,0x30,0x3f,0x20,0xbd,0x3f,0x02,0x20,0x00,0x71,0x01
                sr_err("failed to set offsets: %d", ret);
                return SR_ERR;
        }
+       sr_dbg("hantek-dso: sent CTRL_SETOFFSET");
 
        return SR_OK;
 }
@@ -551,9 +631,6 @@ SR_PRIV int dso_init(struct context *ctx)
        if (dso_enable_trigger(ctx) != SR_OK)
                return SR_ERR;
 
-       if (dso_force_trigger(ctx) != SR_OK)
-               return SR_ERR;
-
        return SR_OK;
 }