#define USB_VENDOR_NAME "ASIX"
#define USB_MODEL_NAME "SIGMA"
#define USB_MODEL_VERSION ""
+#define TRIGGER_TYPES "rf10"
static GSList *device_instances = NULL;
static int cur_firmware = -1;
static int num_probes = 0;
static int samples_per_event = 0;
+static int capture_ratio = 50;
+static struct sigma_trigger trigger;
+static struct sigma_state sigma;
static uint64_t supported_samplerates[] = {
+ KHZ(200),
KHZ(250),
+ KHZ(500),
MHZ(1),
+ MHZ(5),
MHZ(10),
MHZ(25),
MHZ(50),
};
static struct samplerates samplerates = {
- KHZ(250),
+ KHZ(200),
MHZ(200),
0,
supported_samplerates,
static int capabilities[] = {
HWCAP_LOGIC_ANALYZER,
HWCAP_SAMPLERATE,
+ HWCAP_CAPTURE_RATIO,
+ HWCAP_PROBECONFIG,
- /* These are really implemented in the driver, not the hardware. */
HWCAP_LIMIT_MSEC,
0,
};
0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
};
-static const char *firmware_files[] =
-{
+static const char *firmware_files[] = {
"asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
"asix-sigma-100.fw", /* 100 MHz */
"asix-sigma-200.fw", /* 200 MHz */
- "asix-sigma-50sync.fw", /* Asynchronous sampling */
+ "asix-sigma-50sync.fw", /* Synchronous clock from pin */
"asix-sigma-phasor.fw", /* Frequency counter */
};
+static void hw_stop_acquisition(int device_index, gpointer session_device_id);
+
static int sigma_read(void *buf, size_t size)
{
int ret;
*triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
*stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
+ /* Not really sure why this must be done, but according to spec. */
+ if ((--*stoppos & 0x1ff) == 0x1ff)
+ stoppos -= 64;
+
+ if ((*--triggerpos & 0x1ff) == 0x1ff)
+ triggerpos -= 64;
+
return 1;
}
return sigma_read(data, numchunks * CHUNK_SIZE);
}
+/* Upload trigger look-up tables to Sigma. */
+static int sigma_write_trigger_lut(struct triggerlut *lut)
+{
+ int i;
+ uint8_t tmp[2];
+ uint16_t bit;
+
+ /* Transpose the table and send to Sigma. */
+ for (i = 0; i < 16; ++i) {
+ bit = 1 << i;
+
+ tmp[0] = tmp[1] = 0;
+
+ if (lut->m2d[0] & bit)
+ tmp[0] |= 0x01;
+ if (lut->m2d[1] & bit)
+ tmp[0] |= 0x02;
+ if (lut->m2d[2] & bit)
+ tmp[0] |= 0x04;
+ if (lut->m2d[3] & bit)
+ tmp[0] |= 0x08;
+
+ if (lut->m3 & bit)
+ tmp[0] |= 0x10;
+ if (lut->m3s & bit)
+ tmp[0] |= 0x20;
+ if (lut->m4 & bit)
+ tmp[0] |= 0x40;
+
+ if (lut->m0d[0] & bit)
+ tmp[1] |= 0x01;
+ if (lut->m0d[1] & bit)
+ tmp[1] |= 0x02;
+ if (lut->m0d[2] & bit)
+ tmp[1] |= 0x04;
+ if (lut->m0d[3] & bit)
+ tmp[1] |= 0x08;
+
+ if (lut->m1d[0] & bit)
+ tmp[1] |= 0x10;
+ if (lut->m1d[1] & bit)
+ tmp[1] |= 0x20;
+ if (lut->m1d[2] & bit)
+ tmp[1] |= 0x40;
+ if (lut->m1d[3] & bit)
+ tmp[1] |= 0x80;
+
+ sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp));
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i);
+ }
+
+ /* Send the parameters */
+ sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
+ sizeof(lut->params));
+
+ return SIGROK_OK;
+}
+
/* Generate the bitbang stream for programming the FPGA. */
static int bin2bitbang(const char *filename,
unsigned char **buf, size_t *buf_size)
return SIGROK_OK;
}
-static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerate)
+static int set_samplerate(struct sigrok_device_instance *sdi,
+ uint64_t samplerate)
{
int i, ret;
if (samplerate <= MHZ(50)) {
ret = upload_firmware(0);
num_probes = 16;
- // XXX: Setup divider if < 50 MHz
}
if (samplerate == MHZ(100)) {
ret = upload_firmware(1);
cur_samplerate = samplerate;
samples_per_event = 16 / num_probes;
+ sigma.state = SIGMA_IDLE;
g_message("Firmware uploaded");
return ret;
}
+/*
+ * In 100 and 200 MHz mode, only a single pin rising/falling can be
+ * set as trigger. In other modes, two rising/falling triggers can be set,
+ * in addition to value/mask trigger for any number of probes.
+ *
+ * The Sigma supports complex triggers using boolean expressions, but this
+ * has not been implemented yet.
+ */
+static int configure_probes(GSList *probes)
+{
+ struct probe *probe;
+ GSList *l;
+ int trigger_set = 0;
+ int probebit;
+
+ memset(&trigger, 0, sizeof(struct sigma_trigger));
+
+ for (l = probes; l; l = l->next) {
+ probe = (struct probe *)l->data;
+ probebit = 1 << (probe->index - 1);
+
+ if (!probe->enabled || !probe->trigger)
+ continue;
+
+ if (cur_samplerate >= MHZ(100)) {
+ /* Fast trigger support. */
+ if (trigger_set) {
+ g_warning("Asix Sigma only supports a single "
+ "pin trigger in 100 and 200 "
+ "MHz mode.");
+ return SIGROK_ERR;
+ }
+ if (probe->trigger[0] == 'f')
+ trigger.fallingmask |= probebit;
+ else if (probe->trigger[0] == 'r')
+ trigger.risingmask |= probebit;
+ else {
+ g_warning("Asix Sigma only supports "
+ "rising/falling trigger in 100 "
+ "and 200 MHz mode.");
+ return SIGROK_ERR;
+ }
+
+ ++trigger_set;
+ } else {
+ /* Simple trigger support (event). */
+ if (probe->trigger[0] == '1') {
+ trigger.simplevalue |= probebit;
+ trigger.simplemask |= probebit;
+ }
+ else if (probe->trigger[0] == '0') {
+ trigger.simplevalue &= ~probebit;
+ trigger.simplemask |= probebit;
+ }
+ else if (probe->trigger[0] == 'f') {
+ trigger.fallingmask |= probebit;
+ ++trigger_set;
+ }
+ else if (probe->trigger[0] == 'r') {
+ trigger.risingmask |= probebit;
+ ++trigger_set;
+ }
+
+ if (trigger_set > 2) {
+ g_warning("Asix Sigma only supports 2 rising/"
+ "falling triggers.");
+ return SIGROK_ERR;
+ }
+ }
+ }
+
+ return SIGROK_OK;
+}
+
static void hw_closedev(int device_index)
{
device_index = device_index;
info = &samplerates;
break;
case DI_TRIGGER_TYPES:
- info = 0; //TRIGGER_TYPES;
+ info = (char *)TRIGGER_TYPES;
break;
case DI_CUR_SAMPLERATE:
info = &cur_samplerate;
if (capability == HWCAP_SAMPLERATE) {
ret = set_samplerate(sdi, *(uint64_t*) value);
} else if (capability == HWCAP_PROBECONFIG) {
- ret = SIGROK_OK;
+ ret = configure_probes(value);
} else if (capability == HWCAP_LIMIT_MSEC) {
limit_msec = strtoull(value, NULL, 10);
ret = SIGROK_OK;
+ } else if (capability == HWCAP_CAPTURE_RATIO) {
+ capture_ratio = strtoull(value, NULL, 10);
+ ret = SIGROK_OK;
+ } else if (capability == HWCAP_PROBECONFIG) {
+ ret = configure_probes((GSList *) value);
} else {
ret = SIGROK_ERR;
}
return ret;
}
+/* Software trigger to determine exact trigger position. */
+static int get_trigger_offset(uint16_t *samples, uint16_t last_sample,
+ struct sigma_trigger *t)
+{
+ int i;
+
+ for (i = 0; i < 8; ++i) {
+ if (i > 0)
+ last_sample = samples[i-1];
+
+ /* Simple triggers. */
+ if ((samples[i] & t->simplemask) != t->simplevalue)
+ continue;
+
+ /* Rising edge. */
+ if ((last_sample & t->risingmask) != 0 || (samples[i] &
+ t->risingmask) != t->risingmask)
+ continue;
+
+ /* Falling edge. */
+ if ((last_sample & t->fallingmask) != t->fallingmask ||
+ (samples[i] & t->fallingmask) != 0)
+ continue;
+
+ break;
+ }
+
+ /* If we did not match, return original trigger pos. */
+ return i & 0x7;
+}
+
/*
* Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
* Each event is 20ns apart, and can contain multiple samples.
* spread 20 ns apart.
*/
static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
- uint16_t *lastsample, void *user_data)
+ uint16_t *lastsample, int triggerpos, void *user_data)
{
uint16_t tsdiff, ts;
uint16_t samples[65536 * samples_per_event];
int clustersize = EVENTS_PER_CLUSTER * samples_per_event;
uint16_t *event;
uint16_t cur_sample;
+ int triggerts = -1;
+
+ /* Check if trigger is in this chunk. */
+ if (triggerpos != -1) {
+ if (cur_samplerate <= MHZ(50))
+ triggerpos -= EVENTS_PER_CLUSTER - 1;
+
+ if (triggerpos < 0)
+ triggerpos = 0;
- /* For each ts */
+ /* Find in which cluster the trigger occured. */
+ triggerts = triggerpos / 7;
+ }
+
+ /* For each ts. */
for (i = 0; i < 64; ++i) {
ts = *(uint16_t *) &buf[i * 16];
tsdiff = ts - *lastts;
n = numpad;
}
- event = (uint16_t *) &buf[i * 16 + 2];
+ /* Send samples between previous and this timestamp to sigrok. */
+ sent = 0;
+ while (sent < n) {
+ tosend = MIN(2048, n - sent);
+
+ packet.type = DF_LOGIC;
+ packet.length = tosend * sizeof(uint16_t);
+ packet.unitsize = 2;
+ packet.payload = samples + sent;
+ session_bus(user_data, &packet);
+ sent += tosend;
+ }
+ n = 0;
+
+ event = (uint16_t *) &buf[i * 16 + 2];
cur_sample = 0;
/* For each event in cluster. */
}
}
- *lastsample = samples[n - 1];
-
- /* Send to sigrok. */
+ /* Send data up to trigger point (if triggered). */
sent = 0;
- while (sent < n) {
- tosend = MIN(2048, n - sent);
+ if (i == triggerts) {
+ /*
+ * Trigger is not always accurate to sample because of
+ * pipeline delay. However, it always triggers before
+ * the actual event. We therefore look at the next
+ * samples to pinpoint the exact position of the trigger.
+ */
+ tosend = get_trigger_offset(samples, *lastsample,
+ &trigger);
+
+ if (tosend > 0) {
+ packet.type = DF_LOGIC;
+ packet.length = tosend * sizeof(uint16_t);
+ packet.unitsize = 2;
+ packet.payload = samples;
+ session_bus(user_data, &packet);
+
+ sent += tosend;
+ }
- packet.type = DF_LOGIC16;
- packet.length = tosend * sizeof(uint16_t);
- packet.payload = samples + sent;
+ packet.type = DF_TRIGGER;
+ packet.length = 0;
+ packet.payload = 0;
session_bus(user_data, &packet);
-
- sent += tosend;
}
+
+ /* Send rest of the chunk to sigrok. */
+ tosend = n - sent;
+
+ packet.type = DF_LOGIC;
+ packet.length = tosend * sizeof(uint16_t);
+ packet.unitsize = 2;
+ packet.payload = samples + sent;
+ session_bus(user_data, &packet);
+
+ *lastsample = samples[n - 1];
}
return SIGROK_OK;
struct datafeed_packet packet;
const int chunks_per_read = 32;
unsigned char buf[chunks_per_read * CHUNK_SIZE];
- int bufsz, numchunks, curchunk, i, newchunks;
- uint32_t triggerpos, stoppos, running_msec;
+ int bufsz, numchunks, i, newchunks;
+ uint32_t running_msec;
struct timeval tv;
- uint16_t lastts = 0;
- uint16_t lastsample = 0;
fd = fd;
revents = revents;
- /* Get the current position. */
- sigma_read_pos(&stoppos, &triggerpos);
- numchunks = stoppos / 512;
+ numchunks = sigma.stoppos / 512;
- /* Check if the has expired, or memory is full. */
- gettimeofday(&tv, 0);
- running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
- (tv.tv_usec - start_tv.tv_usec) / 1000;
-
- if (running_msec < limit_msec && numchunks < 32767)
+ if (sigma.state == SIGMA_IDLE)
return FALSE;
- /* Stop acqusition. */
- sigma_set_register(WRITE_MODE, 0x11);
+ if (sigma.state == SIGMA_CAPTURE) {
- /* Set SDRAM Read Enable. */
- sigma_set_register(WRITE_MODE, 0x02);
+ /* Check if the timer has expired, or memory is full. */
+ gettimeofday(&tv, 0);
+ running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
+ (tv.tv_usec - start_tv.tv_usec) / 1000;
- /* Get the current position. */
- sigma_read_pos(&stoppos, &triggerpos);
+ if (running_msec < limit_msec && numchunks < 32767)
+ return FALSE;
+
+ hw_stop_acquisition(-1, user_data);
+
+ return FALSE;
+
+ } else if (sigma.state == SIGMA_DOWNLOAD) {
+ if (sigma.chunks_downloaded >= numchunks) {
+ /* End of samples. */
+ packet.type = DF_END;
+ packet.length = 0;
+ session_bus(user_data, &packet);
- /* Read mode status. We will care for this later. */
- sigma_get_register(READ_MODE);
+ sigma.state = SIGMA_IDLE;
- /* Download sample data. */
- for (curchunk = 0; curchunk < numchunks;) {
- newchunks = MIN(chunks_per_read, numchunks - curchunk);
+ return TRUE;
+ }
+
+ newchunks = MIN(chunks_per_read,
+ numchunks - sigma.chunks_downloaded);
g_message("Downloading sample data: %.0f %%",
- 100.0 * curchunk / numchunks);
+ 100.0 * sigma.chunks_downloaded / numchunks);
- bufsz = sigma_read_dram(curchunk, newchunks, buf);
+ bufsz = sigma_read_dram(sigma.chunks_downloaded,
+ newchunks, buf);
/* Find first ts. */
- if (curchunk == 0)
- lastts = *(uint16_t *) buf - 1;
+ if (sigma.chunks_downloaded == 0) {
+ sigma.lastts = *(uint16_t *) buf - 1;
+ sigma.lastsample = 0;
+ }
/* Decode chunks and send them to sigrok. */
for (i = 0; i < newchunks; ++i) {
- decode_chunk_ts(buf + (i * CHUNK_SIZE),
- &lastts, &lastsample, user_data);
+ if (sigma.chunks_downloaded + i == sigma.triggerchunk)
+ decode_chunk_ts(buf + (i * CHUNK_SIZE),
+ &sigma.lastts, &sigma.lastsample,
+ sigma.triggerpos & 0x1ff,
+ user_data);
+ else
+ decode_chunk_ts(buf + (i * CHUNK_SIZE),
+ &sigma.lastts, &sigma.lastsample,
+ -1, user_data);
}
- curchunk += newchunks;
+ sigma.chunks_downloaded += newchunks;
}
- /* End of data */
- packet.type = DF_END;
- packet.length = 0;
- session_bus(user_data, &packet);
-
return TRUE;
}
+/* Build a LUT entry used by the trigger functions. */
+static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
+{
+ int i, j, k, bit;
+
+ /* For each quad probe. */
+ for (i = 0; i < 4; ++i) {
+ entry[i] = 0xffff;
+
+ /* For each bit in LUT. */
+ for (j = 0; j < 16; ++j)
+
+ /* For each probe in quad. */
+ for (k = 0; k < 4; ++k) {
+ bit = 1 << (i * 4 + k);
+
+ /* Set bit in entry */
+ if ((mask & bit) &&
+ ((!(value & bit)) !=
+ (!(j & (1 << k)))))
+ entry[i] &= ~(1 << j);
+ }
+ }
+}
+
+/* Add a logical function to LUT mask. */
+static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
+ int index, int neg, uint16_t *mask)
+{
+ int i, j;
+ int x[2][2], tmp, a, b, aset, bset, rset;
+
+ memset(x, 0, 4 * sizeof(int));
+
+ /* Trigger detect condition. */
+ switch (oper) {
+ case OP_LEVEL:
+ x[0][1] = 1;
+ x[1][1] = 1;
+ break;
+ case OP_NOT:
+ x[0][0] = 1;
+ x[1][0] = 1;
+ break;
+ case OP_RISE:
+ x[0][1] = 1;
+ break;
+ case OP_FALL:
+ x[1][0] = 1;
+ break;
+ case OP_RISEFALL:
+ x[0][1] = 1;
+ x[1][0] = 1;
+ break;
+ case OP_NOTRISE:
+ x[1][1] = 1;
+ x[0][0] = 1;
+ x[1][0] = 1;
+ break;
+ case OP_NOTFALL:
+ x[1][1] = 1;
+ x[0][0] = 1;
+ x[0][1] = 1;
+ break;
+ case OP_NOTRISEFALL:
+ x[1][1] = 1;
+ x[0][0] = 1;
+ break;
+ }
+
+ /* Transpose if neg is set. */
+ if (neg) {
+ for (i = 0; i < 2; ++i)
+ for (j = 0; j < 2; ++j) {
+ tmp = x[i][j];
+ x[i][j] = x[1-i][1-j];
+ x[1-i][1-j] = tmp;
+ }
+ }
+
+ /* Update mask with function. */
+ for (i = 0; i < 16; ++i) {
+ a = (i >> (2 * index + 0)) & 1;
+ b = (i >> (2 * index + 1)) & 1;
+
+ aset = (*mask >> i) & 1;
+ bset = x[b][a];
+
+ if (func == FUNC_AND || func == FUNC_NAND)
+ rset = aset & bset;
+ else if (func == FUNC_OR || func == FUNC_NOR)
+ rset = aset | bset;
+ else if (func == FUNC_XOR || func == FUNC_NXOR)
+ rset = aset ^ bset;
+
+ if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
+ rset = !rset;
+
+ *mask &= ~(1 << i);
+
+ if (rset)
+ *mask |= 1 << i;
+ }
+}
+
+/*
+ * Build trigger LUTs used by 50 MHz and lower sample rates for supporting
+ * simple pin change and state triggers. Only two transitions (rise/fall) can be
+ * set at any time, but a full mask and value can be set (0/1).
+ */
+static int build_basic_trigger(struct triggerlut *lut)
+{
+ int i,j;
+ uint16_t masks[2] = { 0, 0 };
+
+ memset(lut, 0, sizeof(struct triggerlut));
+
+ /* Contant for simple triggers. */
+ lut->m4 = 0xa000;
+
+ /* Value/mask trigger support. */
+ build_lut_entry(trigger.simplevalue, trigger.simplemask, lut->m2d);
+
+ /* Rise/fall trigger support. */
+ for (i = 0, j = 0; i < 16; ++i) {
+ if (trigger.risingmask & (1 << i) ||
+ trigger.fallingmask & (1 << i))
+ masks[j++] = 1 << i;
+ }
+
+ build_lut_entry(masks[0], masks[0], lut->m0d);
+ build_lut_entry(masks[1], masks[1], lut->m1d);
+
+ /* Add glue logic */
+ if (masks[0] || masks[1]) {
+ /* Transition trigger. */
+ if (masks[0] & trigger.risingmask)
+ add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
+ if (masks[0] & trigger.fallingmask)
+ add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
+ if (masks[1] & trigger.risingmask)
+ add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
+ if (masks[1] & trigger.fallingmask)
+ add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
+ } else {
+ /* Only value/mask trigger. */
+ lut->m3 = 0xffff;
+ }
+
+ /* Triggertype: event. */
+ lut->params.selres = 3;
+
+ return SIGROK_OK;
+}
+
static int hw_start_acquisition(int device_index, gpointer session_device_id)
{
struct sigrok_device_instance *sdi;
struct datafeed_packet packet;
struct datafeed_header header;
- uint8_t trigger_option[2] = { 0x38, 0x00 };
struct clockselect_50 clockselect;
int frac;
+ uint8_t triggerselect;
+ struct triggerinout triggerinout_conf;
+ struct triggerlut lut;
+ int triggerpin;
session_device_id = session_device_id;
device_index = device_index;
- /* If the samplerate has not been set, default to 200 MHz. */
+ /* If the samplerate has not been set, default to 50 MHz. */
if (cur_firmware == -1)
- set_samplerate(sdi, 200);
+ set_samplerate(sdi, MHZ(50));
- /* Setup trigger (by trigger-in). */
+ /* Enter trigger programming mode. */
sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
- /* More trigger setup. */
+ /* 100 and 200 MHz mode. */
+ if (cur_samplerate >= MHZ(100)) {
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81);
+
+ /* Find which pin to trigger on from mask. */
+ for (triggerpin = 0; triggerpin < 8; ++triggerpin)
+ if ((trigger.risingmask | trigger.fallingmask) &
+ (1 << triggerpin))
+ break;
+
+ /* Set trigger pin and light LED on trigger. */
+ triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
+
+ /* Default rising edge. */
+ if (trigger.fallingmask)
+ triggerselect |= 1 << 3;
+
+ /* All other modes. */
+ } else if (cur_samplerate <= MHZ(50)) {
+ build_basic_trigger(&lut);
+
+ sigma_write_trigger_lut(&lut);
+
+ triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
+ }
+
+ /* Setup trigger in and out pins to default values. */
+ memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
+ triggerinout_conf.trgout_bytrigger = 1;
+ triggerinout_conf.trgout_enable = 1;
+
sigma_write_register(WRITE_TRIGGER_OPTION,
- trigger_option, sizeof(trigger_option));
+ (uint8_t *) &triggerinout_conf,
+ sizeof(struct triggerinout));
- /* Trigger normal (falling edge). */
- sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
+ /* Go back to normal mode. */
+ sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect);
/* Set clock select register. */
if (cur_samplerate == MHZ(200))
else {
/*
* 50 MHz mode (or fraction thereof). Any fraction down to
- * 50 MHz / 256 can be used, but is not suppoted by sigrok API.
+ * 50 MHz / 256 can be used, but is not supported by sigrok API.
*/
frac = MHZ(50) / cur_samplerate - 1;
}
/* Setup maximum post trigger time. */
- sigma_set_register(WRITE_POST_TRIGGER, 0xff);
+ sigma_set_register(WRITE_POST_TRIGGER, (capture_ratio * 255) / 100);
- /* Start acqusition (software trigger start). */
+ /* Start acqusition. */
gettimeofday(&start_tv, 0);
sigma_set_register(WRITE_MODE, 0x0d);
- /* Add capture source. */
- source_add(0, G_IO_IN, 10, receive_data, session_device_id);
-
- receive_data(0, 1, session_device_id);
-
/* Send header packet to the session bus. */
packet.type = DF_HEADER;
packet.length = sizeof(struct datafeed_header);
gettimeofday(&header.starttime, NULL);
header.samplerate = cur_samplerate;
header.protocol_id = PROTO_RAW;
- header.num_probes = num_probes;
+ header.num_logic_probes = num_probes;
+ header.num_analog_probes = 0;
session_bus(session_device_id, &packet);
+ /* Add capture source. */
+ source_add(0, G_IO_IN, 10, receive_data, session_device_id);
+
+ sigma.state = SIGMA_CAPTURE;
+
return SIGROK_OK;
}
static void hw_stop_acquisition(int device_index, gpointer session_device_id)
{
+ uint8_t modestatus;
+
device_index = device_index;
session_device_id = session_device_id;
/* Stop acquisition. */
sigma_set_register(WRITE_MODE, 0x11);
- // XXX Set some state to indicate that data should be sent to sigrok
- // Now, we just wait for timeout
+ /* Set SDRAM Read Enable. */
+ sigma_set_register(WRITE_MODE, 0x02);
+
+ /* Get the current position. */
+ sigma_read_pos(&sigma.stoppos, &sigma.triggerpos);
+
+ /* Check if trigger has fired. */
+ modestatus = sigma_get_register(READ_MODE);
+ if (modestatus & 0x20) {
+ sigma.triggerchunk = sigma.triggerpos / 512;
+
+ } else
+ sigma.triggerchunk = -1;
+
+ sigma.chunks_downloaded = 0;
+
+ sigma.state = SIGMA_DOWNLOAD;
}
struct device_plugin asix_sigma_plugin_info = {
projects / libsigrok.git / blobdiff