#define USB_VENDOR_NAME "ASIX"
#define USB_MODEL_NAME "SIGMA"
#define USB_MODEL_VERSION ""
+#define TRIGGER_TYPES "rf"
static GSList *device_instances = NULL;
static int cur_firmware = -1;
static int num_probes = 0;
static int samples_per_event = 0;
+static int capture_ratio = 50;
+
+/* Single-pin trigger support */
+static uint8_t triggerpin = 1;
+static uint8_t triggerfall = 0;
static uint64_t supported_samplerates[] = {
+ KHZ(200),
KHZ(250),
+ KHZ(500),
MHZ(1),
+ MHZ(5),
MHZ(10),
MHZ(25),
MHZ(50),
};
static struct samplerates samplerates = {
- KHZ(250),
+ KHZ(200),
MHZ(200),
0,
supported_samplerates,
static int capabilities[] = {
HWCAP_LOGIC_ANALYZER,
HWCAP_SAMPLERATE,
+ HWCAP_CAPTURE_RATIO,
+ HWCAP_PROBECONFIG,
/* These are really implemented in the driver, not the hardware. */
HWCAP_LIMIT_MSEC,
"asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
"asix-sigma-100.fw", /* 100 MHz */
"asix-sigma-200.fw", /* 200 MHz */
- "asix-sigma-50sync.fw", /* Asynchronous sampling */
+ "asix-sigma-50sync.fw", /* Synchronous clock from pin */
"asix-sigma-phasor.fw", /* Frequency counter */
};
-static int sigma_read(void* buf, size_t size)
+static int sigma_read(void *buf, size_t size)
{
int ret;
*triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
*stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
+ /* Not really sure why this must be done, but according to spec. */
+ if ((--*stoppos & 0x1ff) == 0x1ff)
+ stoppos -= 64;
+
+ if ((*--triggerpos & 0x1ff) == 0x1ff)
+ triggerpos -= 64;
+
return 1;
}
break;
}
- /* Prepare firmware */
+ /* Prepare firmware. */
snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
firmware_files[firmware_idx]);
g_free(buf);
if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) {
- g_warning("ftdi_set_bitmode failed: %s",
+ g_warning("ftdi_set_bitmode failed: %s",
ftdi_get_error_string(&ftdic));
return SIGROK_ERR;
}
struct sigrok_device_instance *sdi;
int ret;
- /* Make sure it's an ASIX SIGMA */
+ /* Make sure it's an ASIX SIGMA. */
if ((ret = ftdi_usb_open_desc(&ftdic,
USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
if (samplerate <= MHZ(50)) {
ret = upload_firmware(0);
num_probes = 16;
- // XXX: Setup divider if < 50 MHz
}
if (samplerate == MHZ(100)) {
ret = upload_firmware(1);
return ret;
}
+/* Only trigger on single pin supported (in 100-200 MHz modes) */
+static int configure_probes(GSList *probes)
+{
+ struct probe *probe;
+ GSList *l;
+ int trigger_set = 0;
+
+ for (l = probes; l; l = l->next) {
+ probe = (struct probe *)l->data;
+
+ if (!probe->enabled || !probe->trigger)
+ continue;
+
+ if (trigger_set) {
+ g_warning("Asix Sigma only supports a single pin trigger"
+ " in 100 and 200 MHz mode.");
+
+ return SIGROK_ERR;
+ }
+
+ /* Found trigger */
+ if (probe->trigger[0] == 'f')
+ triggerfall = 1;
+ else
+ triggerfall = 0;
+
+ triggerpin = probe->index - 1;
+ trigger_set = 1;
+ }
+
+ return SIGROK_OK;
+}
+
static void hw_closedev(int device_index)
{
device_index = device_index;
info = &samplerates;
break;
case DI_TRIGGER_TYPES:
- info = 0; //TRIGGER_TYPES;
+ info = (char *)TRIGGER_TYPES;
break;
case DI_CUR_SAMPLERATE:
info = &cur_samplerate;
if (capability == HWCAP_SAMPLERATE) {
ret = set_samplerate(sdi, *(uint64_t*) value);
} else if (capability == HWCAP_PROBECONFIG) {
- ret = SIGROK_OK;
+ ret = configure_probes(value);
} else if (capability == HWCAP_LIMIT_MSEC) {
limit_msec = strtoull(value, NULL, 10);
ret = SIGROK_OK;
+ } else if (capability == HWCAP_CAPTURE_RATIO) {
+ capture_ratio = strtoull(value, NULL, 10);
+ ret = SIGROK_OK;
+ } else if (capability == HWCAP_PROBECONFIG) {
+ ret = configure_probes((GSList *) value);
} else {
ret = SIGROK_ERR;
}
* spread 20 ns apart.
*/
static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
- uint16_t *lastsample, void *user_data)
+ uint16_t *lastsample, int triggerpos, void *user_data)
{
uint16_t tsdiff, ts;
uint16_t samples[65536 * samples_per_event];
int clustersize = EVENTS_PER_CLUSTER * samples_per_event;
uint16_t *event;
uint16_t cur_sample;
+ int triggerts = -1;
+
+ /* Find in which cluster the trigger occured */
+ if (triggerpos != -1)
+ triggerts = (triggerpos / 7);
/* For each ts */
for (i = 0; i < 64; ++i) {
n = numpad;
}
- event = (uint16_t *) &buf[i * 16 + 2];
+ /* Send samples between previous and this timestamp to sigrok. */
+ sent = 0;
+ while (sent < n) {
+ tosend = MIN(2048, n - sent);
+
+ packet.type = DF_LOGIC16;
+ packet.length = tosend * sizeof(uint16_t);
+ packet.payload = samples + sent;
+ session_bus(user_data, &packet);
+ sent += tosend;
+ }
+ n = 0;
+
+ event = (uint16_t *) &buf[i * 16 + 2];
cur_sample = 0;
/* For each event in cluster. */
*lastsample = samples[n - 1];
- /* Send to sigrok. */
+ /* Send data up to trigger point (if triggered) */
sent = 0;
- while (sent < n) {
- tosend = MIN(2048, n - sent);
+ if (i == triggerts) {
+ /*
+ * Trigger is presumptively only accurate to event, i.e.
+ * for 100 and 200 MHz, where multiple samples are coded
+ * in a single event, the trigger does not match the
+ * exact sample.
+ */
+ tosend = (triggerpos % 7) - 3;
+
+ if (tosend > 0) {
+ packet.type = DF_LOGIC16;
+ packet.length = tosend * sizeof(uint16_t);
+ packet.payload = samples;
+ session_bus(user_data, &packet);
+
+ sent += tosend;
+ }
- packet.type = DF_LOGIC16;
- packet.length = tosend * sizeof(uint16_t);
- packet.payload = samples + sent;
+ packet.type = DF_TRIGGER;
+ packet.length = 0;
+ packet.payload = 0;
session_bus(user_data, &packet);
-
- sent += tosend;
}
+
+ /* Send rest of the chunk to sigrok */
+ tosend = n - sent;
+
+ packet.type = DF_LOGIC16;
+ packet.length = tosend * sizeof(uint16_t);
+ packet.payload = samples + sent;
+ session_bus(user_data, &packet);
}
return SIGROK_OK;
struct timeval tv;
uint16_t lastts = 0;
uint16_t lastsample = 0;
+ uint8_t modestatus;
+ int triggerchunk = -1;
fd = fd;
revents = revents;
/* Get the current position. */
sigma_read_pos(&stoppos, &triggerpos);
- /* Read mode status. We will care for this later. */
- sigma_get_register(READ_MODE);
+ /* Check if trigger has fired */
+ modestatus = sigma_get_register(READ_MODE);
+ if (modestatus & 0x20) {
+ triggerchunk = triggerpos / 512;
+ }
/* Download sample data. */
for (curchunk = 0; curchunk < numchunks;) {
/* Decode chunks and send them to sigrok. */
for (i = 0; i < newchunks; ++i) {
- decode_chunk_ts(buf + (i * CHUNK_SIZE),
- &lastts, &lastsample, user_data);
+ if (curchunk + i == triggerchunk)
+ decode_chunk_ts(buf + (i * CHUNK_SIZE),
+ &lastts, &lastsample,
+ triggerpos & 0x1ff, user_data);
+ else
+ decode_chunk_ts(buf + (i * CHUNK_SIZE),
+ &lastts, &lastsample,
+ -1, user_data);
}
curchunk += newchunks;
struct sigrok_device_instance *sdi;
struct datafeed_packet packet;
struct datafeed_header header;
- uint8_t trigger_option[2] = { 0x38, 0x00 };
+ struct clockselect_50 clockselect;
+ int frac;
+ uint8_t triggerselect;
+ struct triggerinout triggerinout_conf;
session_device_id = session_device_id;
device_index = device_index;
- if (cur_firmware == -1) {
- /* Samplerate has not been set. Default to 200 MHz */
- set_samplerate(sdi, 200);
- }
+ /* If the samplerate has not been set, default to 50 MHz. */
+ if (cur_firmware == -1)
+ set_samplerate(sdi, MHZ(50));
- /* Setup trigger (by trigger-in). */
+ /* Enter trigger programming mode */
sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
- /* More trigger setup. */
+ /* 100 and 200 MHz mode */
+ if (cur_samplerate >= MHZ(100)) {
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81);
+
+ triggerselect = (1 << LEDSEL1) | (triggerfall << 3) |
+ (triggerpin & 0x7);
+
+ /* All other modes */
+ } else if (cur_samplerate <= MHZ(50)) {
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
+
+ triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
+ }
+
+ /* Setup trigger in and out pins to default values */
+ memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
+ triggerinout_conf.trgout_bytrigger = 1;
+ triggerinout_conf.trgout_enable = 1;
+
sigma_write_register(WRITE_TRIGGER_OPTION,
- trigger_option, sizeof(trigger_option));
+ (uint8_t *) &triggerinout_conf,
+ sizeof(struct triggerinout));
- /* Trigger normal (falling edge). */
- sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
+ /* Go back to normal mode */
+ sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect);
/* Set clock select register. */
if (cur_samplerate == MHZ(200))
sigma_set_register(WRITE_CLOCK_SELECT, 0x00);
else {
/*
- * 50 MHz mode (or fraction thereof)
- * Any fraction down to 50 MHz / 256 can be used,
- * but is not suppoted by Sigrok API.
+ * 50 MHz mode (or fraction thereof). Any fraction down to
+ * 50 MHz / 256 can be used, but is not suppoted by sigrok API.
*/
+ frac = MHZ(50) / cur_samplerate - 1;
- int frac = MHZ(50) / cur_samplerate - 1;
-
- struct clockselect_50 clockselect = {
- .async = 0,
- .fraction = frac,
- .disabled_probes = 0,
- };
+ clockselect.async = 0;
+ clockselect.fraction = frac;
+ clockselect.disabled_probes = 0;
sigma_write_register(WRITE_CLOCK_SELECT,
- (uint8_t *) &clockselect,
- sizeof(clockselect));
+ (uint8_t *) &clockselect,
+ sizeof(clockselect));
}
-
/* Setup maximum post trigger time. */
- sigma_set_register(WRITE_POST_TRIGGER, 0xff);
+ sigma_set_register(WRITE_POST_TRIGGER, (capture_ratio * 256) / 100);
/* Start acqusition (software trigger start). */
gettimeofday(&start_tv, 0);
sigma_set_register(WRITE_MODE, 0x0d);
- /* Add capture source. */
- source_add(0, G_IO_IN, 10, receive_data, session_device_id);
-
- receive_data(0, 1, session_device_id);
-
/* Send header packet to the session bus. */
packet.type = DF_HEADER;
packet.length = sizeof(struct datafeed_header);
header.num_probes = num_probes;
session_bus(session_device_id, &packet);
+ /* Add capture source. */
+ source_add(0, G_IO_IN, 10, receive_data, session_device_id);
+
return SIGROK_OK;
}
hw_get_capabilities,
hw_set_configuration,
hw_start_acquisition,
- hw_stop_acquisition
+ hw_stop_acquisition,
};