#include <glib/gstdio.h>
#include <ftdi.h>
#include <string.h>
+#include <unistd.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include "asix-sigma.h"
#define USB_DESCRIPTION "ASIX SIGMA"
#define USB_VENDOR_NAME "ASIX"
#define USB_MODEL_NAME "SIGMA"
-#define TRIGGER_TYPE "rf10"
SR_PRIV struct sr_dev_driver asix_sigma_driver_info;
static struct sr_dev_driver *di = &asix_sigma_driver_info;
static const int32_t hwcaps[] = {
SR_CONF_LOGIC_ANALYZER,
SR_CONF_SAMPLERATE,
- SR_CONF_TRIGGER_TYPE,
+ SR_CONF_TRIGGER_MATCH,
SR_CONF_CAPTURE_RATIO,
SR_CONF_LIMIT_MSEC,
- SR_CONF_LIMIT_SAMPLES,
+};
+
+static const int32_t trigger_matches[] = {
+ SR_TRIGGER_ZERO,
+ SR_TRIGGER_ONE,
+ SR_TRIGGER_RISING,
+ SR_TRIGGER_FALLING,
};
static const char *sigma_firmware_files[] = {
sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
- devc->cur_samplerate = 0;
+ devc->cur_samplerate = samplerates[0];
devc->period_ps = 0;
devc->limit_msec = 0;
devc->cur_firmware = -1;
if (samplerate <= SR_MHZ(50)) {
ret = upload_firmware(0, devc);
devc->num_channels = 16;
- }
- if (samplerate == SR_MHZ(100)) {
+ } else if (samplerate == SR_MHZ(100)) {
ret = upload_firmware(1, devc);
devc->num_channels = 8;
- }
- else if (samplerate == SR_MHZ(200)) {
+ } else if (samplerate == SR_MHZ(200)) {
ret = upload_firmware(2, devc);
devc->num_channels = 4;
}
- devc->cur_samplerate = samplerate;
- devc->period_ps = 1000000000000ULL / samplerate;
- devc->samples_per_event = 16 / devc->num_channels;
- devc->state.state = SIGMA_IDLE;
+ if (ret == SR_OK) {
+ devc->cur_samplerate = samplerate;
+ devc->period_ps = 1000000000000ULL / samplerate;
+ devc->samples_per_event = 16 / devc->num_channels;
+ devc->state.state = SIGMA_IDLE;
+ }
return ret;
}
* The Sigma supports complex triggers using boolean expressions, but this
* has not been implemented yet.
*/
-static int configure_channels(const struct sr_dev_inst *sdi)
+static int convert_trigger(const struct sr_dev_inst *sdi)
{
- struct dev_context *devc = sdi->priv;
- const struct sr_channel *ch;
- const GSList *l;
- int trigger_set = 0;
- int channelbit;
+ struct dev_context *devc;
+ struct sr_trigger *trigger;
+ struct sr_trigger_stage *stage;
+ struct sr_trigger_match *match;
+ const GSList *l, *m;
+ int channelbit, trigger_set;
+ devc = sdi->priv;
memset(&devc->trigger, 0, sizeof(struct sigma_trigger));
+ if (!(trigger = sr_session_trigger_get(sdi->session)))
+ return SR_OK;
+
+ trigger_set = 0;
+ for (l = trigger->stages; l; l = l->next) {
+ stage = l->data;
+ for (m = stage->matches; m; m = m->next) {
+ match = m->data;
+ if (!match->channel->enabled)
+ /* Ignore disabled channels with a trigger. */
+ continue;
+ channelbit = 1 << (match->channel->index);
+ if (devc->cur_samplerate >= SR_MHZ(100)) {
+ /* Fast trigger support. */
+ if (trigger_set) {
+ sr_err("Only a single pin trigger is "
+ "supported in 100 and 200MHz mode.");
+ return SR_ERR;
+ }
+ if (match->match == SR_TRIGGER_FALLING)
+ devc->trigger.fallingmask |= channelbit;
+ else if (match->match == SR_TRIGGER_RISING)
+ devc->trigger.risingmask |= channelbit;
+ else {
+ sr_err("Only rising/falling trigger is "
+ "supported in 100 and 200MHz mode.");
+ return SR_ERR;
+ }
- for (l = sdi->channels; l; l = l->next) {
- ch = (struct sr_channel *)l->data;
- channelbit = 1 << (ch->index);
-
- if (!ch->enabled || !ch->trigger)
- continue;
-
- if (devc->cur_samplerate >= SR_MHZ(100)) {
- /* Fast trigger support. */
- if (trigger_set) {
- sr_err("Only a single pin trigger in 100 and "
- "200MHz mode is supported.");
- return SR_ERR;
- }
- if (ch->trigger[0] == 'f')
- devc->trigger.fallingmask |= channelbit;
- else if (ch->trigger[0] == 'r')
- devc->trigger.risingmask |= channelbit;
- else {
- sr_err("Only rising/falling trigger in 100 "
- "and 200MHz mode is supported.");
- return SR_ERR;
- }
-
- ++trigger_set;
- } else {
- /* Simple trigger support (event). */
- if (ch->trigger[0] == '1') {
- devc->trigger.simplevalue |= channelbit;
- devc->trigger.simplemask |= channelbit;
- }
- else if (ch->trigger[0] == '0') {
- devc->trigger.simplevalue &= ~channelbit;
- devc->trigger.simplemask |= channelbit;
- }
- else if (ch->trigger[0] == 'f') {
- devc->trigger.fallingmask |= channelbit;
- ++trigger_set;
- }
- else if (ch->trigger[0] == 'r') {
- devc->trigger.risingmask |= channelbit;
++trigger_set;
- }
-
- /*
- * Actually, Sigma supports 2 rising/falling triggers,
- * but they are ORed and the current trigger syntax
- * does not permit ORed triggers.
- */
- if (trigger_set > 1) {
- sr_err("Only 1 rising/falling trigger "
- "is supported.");
- return SR_ERR;
+ } else {
+ /* Simple trigger support (event). */
+ if (match->match == SR_TRIGGER_ONE) {
+ devc->trigger.simplevalue |= channelbit;
+ devc->trigger.simplemask |= channelbit;
+ }
+ else if (match->match == SR_TRIGGER_ZERO) {
+ devc->trigger.simplevalue &= ~channelbit;
+ devc->trigger.simplemask |= channelbit;
+ }
+ else if (match->match == SR_TRIGGER_FALLING) {
+ devc->trigger.fallingmask |= channelbit;
+ ++trigger_set;
+ }
+ else if (match->match == SR_TRIGGER_RISING) {
+ devc->trigger.risingmask |= channelbit;
+ ++trigger_set;
+ }
+
+ /*
+ * Actually, Sigma supports 2 rising/falling triggers,
+ * but they are ORed and the current trigger syntax
+ * does not permit ORed triggers.
+ */
+ if (trigger_set > 1) {
+ sr_err("Only 1 rising/falling trigger "
+ "is supported.");
+ return SR_ERR;
+ }
}
}
-
- if (trigger_set)
- devc->use_triggers = 1;
}
+
return SR_OK;
}
(void)cg;
+ if (!sdi)
+ return SR_ERR;
+ devc = sdi->priv;
+
switch (id) {
case SR_CONF_SAMPLERATE:
- if (sdi) {
- devc = sdi->priv;
- *data = g_variant_new_uint64(devc->cur_samplerate);
- } else
- return SR_ERR;
+ *data = g_variant_new_uint64(devc->cur_samplerate);
+ break;
+ case SR_CONF_LIMIT_MSEC:
+ *data = g_variant_new_uint64(devc->limit_msec);
+ break;
+ case SR_CONF_CAPTURE_RATIO:
+ *data = g_variant_new_uint64(devc->capture_ratio);
break;
default:
return SR_ERR_NA;
const struct sr_channel_group *cg)
{
struct dev_context *devc;
- uint64_t num_samples;
- int ret = 0;
+ uint64_t tmp;
+ int ret;
(void)cg;
devc = sdi->priv;
+ ret = SR_OK;
switch (id) {
case SR_CONF_SAMPLERATE:
ret = set_samplerate(sdi, g_variant_get_uint64(data));
break;
case SR_CONF_LIMIT_MSEC:
- devc->limit_msec = g_variant_get_uint64(data);
- if (devc->limit_msec > 0)
- ret = SR_OK;
+ tmp = g_variant_get_uint64(data);
+ if (tmp > 0)
+ devc->limit_msec = g_variant_get_uint64(data);
else
ret = SR_ERR;
break;
case SR_CONF_LIMIT_SAMPLES:
- num_samples = g_variant_get_uint64(data);
- devc->limit_msec = num_samples * 1000 / devc->cur_samplerate;
+ tmp = g_variant_get_uint64(data);
+ devc->limit_msec = tmp * 1000 / devc->cur_samplerate;
break;
case SR_CONF_CAPTURE_RATIO:
- devc->capture_ratio = g_variant_get_uint64(data);
- if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
- ret = SR_ERR;
+ tmp = g_variant_get_uint64(data);
+ if (tmp <= 100)
+ devc->capture_ratio = tmp;
else
- ret = SR_OK;
+ ret = SR_ERR;
break;
default:
ret = SR_ERR_NA;
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
- case SR_CONF_TRIGGER_TYPE:
- *data = g_variant_new_string(TRIGGER_TYPE);
+ case SR_CONF_TRIGGER_MATCH:
+ *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
+ trigger_matches, ARRAY_SIZE(trigger_matches),
+ sizeof(int32_t));
break;
default:
return SR_ERR_NA;
static void sigma_decode_dram_cluster(struct sigma_dram_cluster *dram_cluster,
unsigned int events_in_cluster,
+ unsigned int triggered,
struct sr_dev_inst *sdi)
{
struct dev_context *devc = sdi->priv;
uint8_t samples[2048];
unsigned int i;
- int triggerts = -1;
-
ts = sigma_dram_cluster_ts(dram_cluster);
tsdiff = ts - ss->lastts;
ss->lastts = ts;
*/
if ((i == 1023) || (ts == (tsdiff - EVENTS_PER_CLUSTER))) {
logic.length = (i + 1) * logic.unitsize;
- sr_session_send(devc->cb_data, &packet);
+ sr_session_send(sdi, &packet);
}
}
/* Send data up to trigger point (if triggered). */
int trigger_offset = 0;
- if ((int)i == triggerts) {
+ if (triggered) {
/*
* Trigger is not always accurate to sample because of
* pipeline delay. However, it always triggers before
if (trigger_offset > 0) {
packet.type = SR_DF_LOGIC;
logic.length = trigger_offset * logic.unitsize;
- sr_session_send(devc->cb_data, &packet);
+ sr_session_send(sdi, &packet);
events_in_cluster -= trigger_offset;
}
/* Only send trigger if explicitly enabled. */
if (devc->use_triggers) {
packet.type = SR_DF_TRIGGER;
- sr_session_send(devc->cb_data, &packet);
+ sr_session_send(sdi, &packet);
}
}
packet.type = SR_DF_LOGIC;
logic.length = events_in_cluster * logic.unitsize;
logic.data = samples + (trigger_offset * logic.unitsize);
- sr_session_send(devc->cb_data, &packet);
+ sr_session_send(sdi, &packet);
}
ss->lastsample =
* For 50 MHz and below, events contain one sample for each channel,
* spread 20 ns apart.
*/
-static int decode_chunk_ts(struct sigma_dram_line *dram_line, int triggerpos,
- uint16_t events_in_line, void *cb_data)
+static int decode_chunk_ts(struct sigma_dram_line *dram_line,
+ uint16_t events_in_line,
+ uint32_t trigger_event,
+ struct sr_dev_inst *sdi)
{
struct sigma_dram_cluster *dram_cluster;
- struct sr_dev_inst *sdi = cb_data;
struct dev_context *devc = sdi->priv;
unsigned int clusters_in_line =
(events_in_line + (EVENTS_PER_CLUSTER - 1)) / EVENTS_PER_CLUSTER;
unsigned int events_in_cluster;
unsigned int i;
- int triggerts = -1;
+ uint32_t trigger_cluster = ~0, triggered = 0;
/* Check if trigger is in this chunk. */
- if (triggerpos != -1) {
- if (devc->cur_samplerate <= SR_MHZ(50))
- triggerpos -= EVENTS_PER_CLUSTER - 1;
-
- if (triggerpos < 0)
- triggerpos = 0;
+ if (trigger_event < (64 * 7)) {
+ if (devc->cur_samplerate <= SR_MHZ(50)) {
+ trigger_event -= MIN(EVENTS_PER_CLUSTER - 1,
+ trigger_event);
+ }
/* Find in which cluster the trigger occured. */
- triggerts = triggerpos / EVENTS_PER_CLUSTER;
+ trigger_cluster = trigger_event / EVENTS_PER_CLUSTER;
}
/* For each full DRAM cluster. */
events_in_cluster = EVENTS_PER_CLUSTER;
}
- sigma_decode_dram_cluster(dram_cluster, events_in_cluster, sdi);
+ triggered = (i == trigger_cluster);
+ sigma_decode_dram_cluster(dram_cluster, events_in_cluster,
+ triggered, sdi);
}
return SR_OK;
static int download_capture(struct sr_dev_inst *sdi)
{
struct dev_context *devc = sdi->priv;
- const int chunks_per_read = 32;
+ const uint32_t chunks_per_read = 32;
struct sigma_dram_line *dram_line;
int bufsz;
uint32_t stoppos, triggerpos;
uint32_t i;
uint32_t dl_lines_total, dl_lines_curr, dl_lines_done;
uint32_t dl_events_in_line = 64 * 7;
- uint32_t trg_line = ~0;
+ uint32_t trg_line = ~0, trg_event = ~0;
dram_line = g_try_malloc0(chunks_per_read * sizeof(*dram_line));
if (!dram_line)
/* Check if trigger has fired. */
modestatus = sigma_get_register(READ_MODE, devc);
- if (modestatus & 0x20)
+ if (modestatus & 0x20) {
trg_line = triggerpos >> 9;
+ trg_event = triggerpos & 0x1ff;
+ }
/*
* Determine how many 1024b "DRAM lines" do we need to read from the
}
for (i = 0; i < dl_lines_curr; i++) {
- int trigger_line = -1;
+ uint32_t trigger_event = ~0;
/* The last "DRAM line" can be only partially full. */
if (dl_lines_done + i == dl_lines_total - 1)
dl_events_in_line = stoppos & 0x1ff;
/* Test if the trigger happened on this line. */
if (dl_lines_done + i == trg_line)
- trigger_line = trg_line;
+ trigger_event = trg_event;
- decode_chunk_ts(dram_line + i, trigger_line,
- dl_events_in_line, sdi);
+ decode_chunk_ts(dram_line + i, dl_events_in_line,
+ trigger_event, sdi);
}
dl_lines_done += dl_lines_curr;
devc = sdi->priv;
- if (configure_channels(sdi) != SR_OK) {
- sr_err("Failed to configure channels.");
+ if (convert_trigger(sdi) != SR_OK) {
+ sr_err("Failed to configure triggers.");
return SR_ERR;
}
devc->cb_data = cb_data;
/* Send header packet to the session bus. */
- std_session_send_df_header(cb_data, LOG_PREFIX);
+ std_session_send_df_header(sdi, LOG_PREFIX);
/* Add capture source. */
- sr_source_add(0, G_IO_IN, 10, receive_data, (void *)sdi);
+ sr_session_source_add(sdi->session, 0, G_IO_IN, 10, receive_data, (void *)sdi);
devc->state.state = SIGMA_CAPTURE;
devc = sdi->priv;
devc->state.state = SIGMA_IDLE;
- sr_source_remove(0);
+ sr_session_source_remove(sdi->session, 0);
return SR_OK;
}