# TODO: URLs
#
-import sigrokdecode
+#
+# Protocol output format:
+# put(<startsample>, <endsample>, self.out_proto, <packet>)
+#
+# The <packet> is a list with two entries:
+# [<packet-type>, <packet-data>]
+#
+# Valid packet-type values: T_START, T_DATA, T_PARITY, T_STOP, T_INVALID_START,
+# T_INVALID_STOP, T_PARITY_ERROR
+#
+# The packet-data field has the following format and meaning:
+# - T_START: The data is the (integer) value of the start bit (0 or 1).
+# - T_DATA: The data is the (integer) value of the UART data. Valid values
+# range from 0 to 512 (as the data can be up to 9 bits in size).
+# - T_PARITY: The data is the (integer) value of the parity bit (0 or 1).
+# - T_STOP: The data is the (integer) value of the stop bit (0 or 1).
+# - T_INVALID_START: The data is the (integer) value of the start bit (0 or 1).
+# - T_INVALID_STOP: The data is the (integer) value of the stop bit (0 or 1).
+# - T_PARITY_ERROR: The data is a tuple with two entries. The first one is
+# the expected parity value, the second is the actual parity value.
+#
+# Examples:
+# [T_START, 0]
+# [T_DATA, 65]
+# [T_PARITY, 0]
+# [T_STOP, 1]
+# [T_INVALID_START, 1]
+# [T_INVALID_STOP, 0]
+# [T_PARITY_ERROR, (0, 1)]
+#
+
+import sigrokdecode as srd
# States
WAIT_FOR_START_BIT = 0
LSB_FIRST = 0
MSB_FIRST = 1
-# Output data formats
-DATA_FORMAT_ASCII = 0
-DATA_FORMAT_HEX = 1
+# Annotation feed formats
+ANN_ASCII = 0
+ANN_DEC = 1
+ANN_HEX = 2
+ANN_OCT = 3
+ANN_BITS = 4
+
+# Protocol output packet types
+T_START = 0
+T_DATA = 1
+T_PARITY = 2
+T_STOP = 3
+T_INVALID_START = 4
+T_INVALID_STOP = 5
+T_PARITY_ERROR = 6
# Given a parity type to check (odd, even, zero, one), the value of the
# parity bit, the value of the data, and the length of the data (5-9 bits,
else:
raise Exception('Invalid parity type: %d' % parity_type)
-class Decoder(sigrokdecode.Decoder):
+class Decoder(srd.Decoder):
id = 'uart'
name = 'UART'
longname = 'Universal Asynchronous Receiver/Transmitter (UART)'
'parity_check': ['Check parity', True],
'num_stop_bits': ['Stop bit(s)', STOP_BITS_1],
'bit_order': ['Bit order', LSB_FIRST],
- 'data_format': ['Output data format', DATA_FORMAT_ASCII],
# TODO: Options to invert the signal(s).
# ...
}
+ annotations = [
+ # ANN_ASCII
+ ['ASCII', 'TODO: description'],
+ # ANN_DEC
+ ['Decimal', 'TODO: description'],
+ # ANN_HEX
+ ['Hex', 'TODO: description'],
+ # ANN_OCT
+ ['Octal', 'TODO: description'],
+ # ANN_BITS
+ ['Bits', 'TODO: description'],
+ ]
def __init__(self, **kwargs):
- self.output_protocol = None
- self.output_annotation = None
-
# Set defaults, can be overridden in 'start'.
self.baudrate = 115200
self.num_data_bits = 8
self.check_parity = True
self.num_stop_bits = 1
self.bit_order = LSB_FIRST
- self.data_format = DATA_FORMAT_ASCII
self.samplenum = 0
self.frame_start = -1
def start(self, metadata):
self.samplerate = metadata['samplerate']
- # self.output_protocol = self.output_new(2)
- self.output_annotation = self.output_new(1)
+ self.out_proto = self.add(srd.OUTPUT_PROTO, 'uart')
+ self.out_ann = self.add(srd.OUTPUT_ANN, 'uart')
# TODO
### self.baudrate = metadata['baudrate']
### self.parity_check = metadata['parity_check']
### self.num_stop_bits = metadata['num_stop_bits']
### self.bit_order = metadata['bit_order']
- ### self.data_format = metadata['data_format']
# The width of one UART bit in number of samples.
self.bit_width = float(self.samplerate) / float(self.baudrate)
def get_start_bit(self, signal):
# Skip samples until we're in the middle of the start bit.
if not self.reached_bit(0):
- return []
+ return
self.startbit = signal
+ # The startbit must be 0. If not, we report an error.
if self.startbit != 0:
- # TODO: Startbit must be 0. If not, we report an error.
- pass
+ self.put(self.frame_start, self.samplenum, self.out_proto,
+ [T_INVALID_START, self.startbit])
+ # TODO: Abort? Ignore rest of the frame?
self.cur_data_bit = 0
self.databyte = 0
self.staterx = GET_DATA_BITS
- o = [{'type': 'S', 'range': (self.frame_start, self.samplenum),
- 'data': None, 'ann': 'Start bit'}]
- return o
+ self.put(self.frame_start, self.samplenum, self.out_proto,
+ [T_START, self.startbit])
+ self.put(self.frame_start, self.samplenum, self.out_ann,
+ [ANN_ASCII, ['Start bit', 'Start', 'S']])
def get_data_bits(self, signal):
# Skip samples until we're in the middle of the desired data bit.
if not self.reached_bit(self.cur_data_bit + 1):
- return []
+ return
# Save the sample number where the data byte starts.
if self.startsample == -1:
# Return here, unless we already received all data bits.
if self.cur_data_bit < self.num_data_bits - 1: # TODO? Off-by-one?
self.cur_data_bit += 1
- return []
-
- # Convert the data byte into the configured format.
- if self.data_format == DATA_FORMAT_ASCII:
- d = chr(self.databyte)
- elif self.data_format == DATA_FORMAT_HEX:
- d = '0x%02x' % self.databyte
- else:
- raise Exception('Invalid data format value: %d', self.data_format)
+ return
self.staterx = GET_PARITY_BIT
- o = [{'type': 'D', 'range': (self.startsample, self.samplenum - 1),
- 'data': d, 'ann': None}]
+ self.put(self.startsample, self.samplenum - 1, self.out_proto,
+ [T_DATA, self.databyte])
- return o
+ self.put(self.startsample, self.samplenum - 1, self.out_ann,
+ [ANN_ASCII, [chr(self.databyte)]])
+ self.put(self.startsample, self.samplenum - 1, self.out_ann,
+ [ANN_DEC, [str(self.databyte)]])
+ self.put(self.startsample, self.samplenum - 1, self.out_ann,
+ [ANN_HEX, [hex(self.databyte), hex(self.databyte)[2:]]])
+ self.put(self.startsample, self.samplenum - 1, self.out_ann,
+ [ANN_OCT, [oct(self.databyte), oct(self.databyte)[2:]]])
+ self.put(self.startsample, self.samplenum - 1, self.out_ann,
+ [ANN_BITS, [bin(self.databyte), bin(self.databyte)[2:]]])
def get_parity_bit(self, signal):
# If no parity is used/configured, skip to the next state immediately.
if self.parity == PARITY_NONE:
self.staterx = GET_STOP_BITS
- return []
+ return
# Skip samples until we're in the middle of the parity bit.
if not self.reached_bit(self.num_data_bits + 1):
- return []
+ return
self.paritybit = signal
if parity_ok(self.parity, self.paritybit, self.databyte,
self.num_data_bits):
# TODO: Fix range.
- o = [{'type': 'P', 'range': (self.samplenum, self.samplenum),
- 'data': self.paritybit, 'ann': 'Parity bit'}]
+ self.put(self.samplenum, self.samplenum, self.out_proto,
+ [T_PARITY_BIT, self.paritybit])
+ self.put(self.samplenum, self.samplenum, self.out_ann,
+ [ANN_ASCII, ['Parity bit', 'Parity', 'P']])
else:
- o = [{'type': 'PE', 'range': (self.samplenum, self.samplenum),
- 'data': self.paritybit, 'ann': 'Parity error'}]
-
- return o
+ # TODO: Fix range.
+ # TODO: Return expected/actual parity values.
+ self.put(self.samplenum, self.samplenum, self.out_proto,
+ [T_PARITY_ERROR, (0, 1)]) # FIXME: Dummy tuple...
+ self.put(self.samplenum, self.samplenum, self.out_ann,
+ [ANN_ASCII, ['Parity error', 'Parity err', 'PE']])
# TODO: Currently only supports 1 stop bit.
def get_stop_bits(self, signal):
# Skip samples until we're in the middle of the stop bit(s).
skip_parity = 0 if self.parity == PARITY_NONE else 1
if not self.reached_bit(self.num_data_bits + 1 + skip_parity):
- return []
+ return
self.stopbit1 = signal
+ # Stop bits must be 1. If not, we report an error.
if self.stopbit1 != 1:
- # TODO: Stop bits must be 1. If not, we report an error.
- pass
+ self.put(self.frame_start, self.samplenum, self.out_proto,
+ [T_INVALID_STOP, self.stopbit1])
+ # TODO: Abort? Ignore the frame? Other?
self.staterx = WAIT_FOR_START_BIT
# TODO: Fix range.
- o = [{'type': 'P', 'range': (self.samplenum, self.samplenum),
- 'data': None, 'ann': 'Stop bit'}]
- return o
-
- def decode(self, timeoffset, duration, data): # TODO
- out = []
+ self.put(self.samplenum, self.samplenum, self.out_proto,
+ [T_STOP, self.stopbit1])
+ self.put(self.samplenum, self.samplenum, self.out_ann,
+ [ANN_ASCII, ['Stop bit', 'Stop', 'P']])
+ def decode(self, ss, es, data): # TODO
# for (samplenum, (rx, tx)) in data:
for (samplenum, (rx,)) in data:
if self.staterx == WAIT_FOR_START_BIT:
self.wait_for_start_bit(self.oldrx, rx)
elif self.staterx == GET_START_BIT:
- out += self.get_start_bit(rx)
+ self.get_start_bit(rx)
elif self.staterx == GET_DATA_BITS:
- out += self.get_data_bits(rx)
+ self.get_data_bits(rx)
elif self.staterx == GET_PARITY_BIT:
- out += self.get_parity_bit(rx)
+ self.get_parity_bit(rx)
elif self.staterx == GET_STOP_BITS:
- out += self.get_stop_bits(rx)
+ self.get_stop_bits(rx)
else:
raise Exception('Invalid state: %s' % self.staterx)
self.oldrx = rx
# self.oldtx = tx
- if out != []:
- # self.put(0, 0, self.output_protocol, out_proto)
- self.put(0, 0, self.output_annotation, out)
+ # if proto != []:
+ # self.put(0, 0, self.out_proto, proto)
+ # if ann != []:
+ # self.put(0, 0, self.out_ann, ann)