self.out_ann = self.register(srd.OUTPUT_ANN)
self.out_logic = self.register(srd.OUTPUT_LOGIC)
+ def flush(self):
+ self.put_logic_states()
+
def putx(self, data):
self.put(self.ss, self.es, self.out_ann, data)
# TODO
def handle_reg_0x01(self, b):
+ self.put_logic_states()
self.putx([1, ['Outputs set: %02X' % b]])
self.logic_value = b
# Store the start/end samples of this I²C packet.
self.ss, self.es = ss, es
- self.put_logic_states()
-
# State machine.
if self.state == 'IDLE':
# Wait for an I²C START condition.