uart: handle zero stop bits configuration

[libsigrokdecode.git] / decoders / st7735 / pd.py

diff --git a/decoders/st7735/pd.py b/decoders/st7735/pd.py
index 252b188763c4faf0ca2eed738f5a0be7ac9df0c4..d938a2c52b8840b070401a740d2eb81a42c00698 100644 (file)
--- a/decoders/st7735/pd.py
+++ b/decoders/st7735/pd.py
@@ -89,7 +89,7 @@ class Decoder(srd.Decoder):
     annotation_rows = (
         ('bits', 'Bits', (Ann.BITS,)),
         ('fields', 'Fields', (Ann.CMD, Ann.DATA)),
-        ('description', 'Description', (Ann.DESC,)),
+        ('descriptions', 'Descriptions', (Ann.DESC,)),
     )
 
     def __init__(self):
@@ -108,7 +108,7 @@ class Decoder(srd.Decoder):
     def put_desc(self, ss, es, cmd, data):
         if cmd == -1:
             return
-        if META[cmd]:
+        if cmd in META:
             self.put(ss, es, self.out_ann, [Ann.DESC,
                 ['%s: %s' % (META[cmd]['name'].strip(), META[cmd]['desc'])]])
         else: