cjtag: Give each cJTAG state its own annotation class.

[libsigrokdecode.git] / decoders / spiflash / lists.py

diff --git a/decoders/spiflash/lists.py b/decoders/spiflash/lists.py
index 178533366465270af3d086da6271974731c54dce..c6e07bfdfe1c2ffcad9a048c9bd1e3a99ca79dc7 100644 (file)
--- a/decoders/spiflash/lists.py
+++ b/decoders/spiflash/lists.py
@@ -47,13 +47,16 @@ cmds = OrderedDict([
     (0xb9, ('DP', 'Deep power down')),
     (0xbb, ('2READ', '2x I/O read')), # a.k.a. "Fast read dual I/O".
     (0xc1, ('EXSO', 'Exit secured OTP')),
-    (0xc7, ('CE2', 'Chip erase')), # Alternative command ID
+    (0xc7, ('CE2', 'Chip erase 2')), # Alternative command ID
     (0xd7, ('STATUS', 'Status register read')),
     (0xd8, ('BE', 'Block erase')),
     (0xef, ('REMS2', 'Read ID for 2x I/O mode')),
 ])
 
 device_name = {
+    'adesto': {
+        0x00: 'AT45Dxxx family, standard series',
+    },
     'fidelix': {
         0x15: 'FM25Q32',
     },
@@ -62,9 +65,47 @@ device_name = {
         0x15: 'MX25L3205D',
         0x16: 'MX25L6405D',
     },
+    'winbond': {
+        0x13: 'W25Q80DV',
+    },
 }
 
 chips = {
+    # Adesto
+    'adesto_at45db161e': {
+        'vendor': 'Adesto',
+        'model': 'AT45DB161E',
+        'res_id': None, # The chip doesn't emit an ID here.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': 0x1f26000100, # RDID and 2 extra "EDI" bytes.
+        'page_size': 528, # Configurable, could also be 512 bytes.
+        'sector_size': 128 * 1024,
+        'block_size': 4 * 1024,
+    },
+    # Atmel
+    'atmel_at25128': {
+        'vendor': 'Atmel',
+        'model': 'AT25128',
+        'res_id': None, # Not supported by the chip.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': None, # Not supported by the chip.
+        'page_size': 64,
+        'sector_size': None, # The chip doesn't have sectors.
+        'block_size': None, # The chip doesn't have blocks.
+    },
+    'atmel_at25256': {
+        'vendor': 'Atmel',
+        'model': 'AT25256',
+        'res_id': None, # Not supported by the chip.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': None, # Not supported by the chip.
+        'page_size': 64,
+        'sector_size': None, # The chip doesn't have sectors.
+        'block_size': None, # The chip doesn't have blocks.
+    },
     # FIDELIX
     'fidelix_fm25q32': {
         'vendor': 'FIDELIX',
@@ -111,4 +152,16 @@ chips = {
         'sector_size': 4 * 1024,
         'block_size': 64 * 1024,
     },
+    # Winbond
+    'winbond_w25q80dv': {
+        'vendor': 'Winbond',
+        'model': 'W25Q80DV',
+        'res_id': 0x13,
+        'rems_id': 0xef13,
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': 0xef4014,
+        'page_size': 256,
+        'sector_size': 4 * 1024,
+        'block_size': 64 * 1024, # Configurable, could also be 32 * 1024 bytes.
+    },
 }