adxl345: Use SrdIntEnum for annotation classes.

[libsigrokdecode.git] / decoders / spiflash / lists.py

diff --git a/decoders/spiflash/lists.py b/decoders/spiflash/lists.py
index 5c366beef1cf2e26615917da1b659405ed4a0394..80ca27d7abf1111b31071a386a06a6c719ac1b5d 100644 (file)
--- a/decoders/spiflash/lists.py
+++ b/decoders/spiflash/lists.py
@@ -1,7 +1,7 @@
 ##
 ## This file is part of the libsigrokdecode project.
 ##
-## Copyright (C) 2015 Uwe Hermann <uwe@hermann-uwe.de>
+## Copyright (C) 2015-2020 Uwe Hermann <uwe@hermann-uwe.de>
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
@@ -21,7 +21,6 @@ from collections import OrderedDict
 
 # OrderedDict which maps command IDs to their names and descriptions.
 # Please keep this sorted by command ID.
-# Don't forget to update 'Ann' in pd.py if you add/remove items here.
 cmds = OrderedDict([
     (0x01, ('WRSR', 'Write status register')),
     (0x02, ('PP', 'Page program')),
@@ -47,7 +46,7 @@ cmds = OrderedDict([
     (0xb9, ('DP', 'Deep power down')),
     (0xbb, ('2READ', '2x I/O read')), # a.k.a. "Fast read dual I/O".
     (0xc1, ('EXSO', 'Exit secured OTP')),
-    (0xc7, ('CE2', 'Chip erase')), # Alternative command ID
+    (0xc7, ('CE2', 'Chip erase 2')), # Alternative command ID
     (0xd7, ('STATUS', 'Status register read')),
     (0xd8, ('BE', 'Block erase')),
     (0xef, ('REMS2', 'Read ID for 2x I/O mode')),
@@ -75,14 +74,37 @@ chips = {
     'adesto_at45db161e': {
         'vendor': 'Adesto',
         'model': 'AT45DB161E',
-        'res_id': 0xff, # The chip doesn't emit an ID here.
-        'rems_id': 0xffff, # Not supported by the chip.
-        'rems2_id': 0xffff, # Not supported by the chip.
+        'res_id': None, # The chip doesn't emit an ID here.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
         'rdid_id': 0x1f26000100, # RDID and 2 extra "EDI" bytes.
         'page_size': 528, # Configurable, could also be 512 bytes.
         'sector_size': 128 * 1024,
         'block_size': 4 * 1024,
     },
+    # Atmel
+    'atmel_at25128': {
+        'vendor': 'Atmel',
+        'model': 'AT25128',
+        'res_id': None, # Not supported by the chip.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': None, # Not supported by the chip.
+        'page_size': 64,
+        'sector_size': None, # The chip doesn't have sectors.
+        'block_size': None, # The chip doesn't have blocks.
+    },
+    'atmel_at25256': {
+        'vendor': 'Atmel',
+        'model': 'AT25256',
+        'res_id': None, # Not supported by the chip.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': None, # Not supported by the chip.
+        'page_size': 64,
+        'sector_size': None, # The chip doesn't have sectors.
+        'block_size': None, # The chip doesn't have blocks.
+    },
     # FIDELIX
     'fidelix_fm25q32': {
         'vendor': 'FIDELIX',
@@ -135,7 +157,7 @@ chips = {
         'model': 'W25Q80DV',
         'res_id': 0x13,
         'rems_id': 0xef13,
-        'rems2_id': 0xffff, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
         'rdid_id': 0xef4014,
         'page_size': 256,
         'sector_size': 4 * 1024,