sle44xx: fixup boilerplate, add missing required fields

[libsigrokdecode.git] / decoders / sle44xx / pd.py

diff --git a/decoders/sle44xx/pd.py b/decoders/sle44xx/pd.py
index 62bcdcff62d5d3f9902fe4aef1c748afdc6316a6..e897b13b7b8be1d2901cf79edc9c733cf42e1a80 100644 (file)
--- a/decoders/sle44xx/pd.py
+++ b/decoders/sle44xx/pd.py
@@ -52,6 +52,7 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['sle44xx']
+    tags = ['Memory']
     channels = (
         {'id': 'rst', 'name': 'RST', 'desc': 'Reset line'},
         {'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'},
@@ -66,7 +67,7 @@ class Decoder(srd.Decoder):
     )
     annotation_rows = (
         ('bits', 'Bits', (4,)),
-        ('data', 'Data', (1, 2, 3)),
+        ('fields', 'Fields', (1, 2, 3)),
         ('interrupts', 'Interrupts', (0,)),
     )
     binary = (
@@ -168,4 +169,4 @@ class Decoder(srd.Decoder):
             elif self.matched[2]: # Command mode START: CLK = high, I/O = falling.
                 self.handle_command(pins)
             elif self.matched[3]: # Command mode STOP: CLK = high, I/O = rising.
-                self.handle_command(pins)
\ No newline at end of file
+                self.handle_command(pins)