enc28j60: Implements decoder for ENC28J60 SPI Ethernet chip

[libsigrokdecode.git] / decoders / sdcard_spi / pd.py

diff --git a/decoders/sdcard_spi/pd.py b/decoders/sdcard_spi/pd.py
index 6b5486d32b492ca425831e20717b9b9e1f476374..962438f149a46247055ec5ea155b3217aceae56a 100644 (file)
--- a/decoders/sdcard_spi/pd.py
+++ b/decoders/sdcard_spi/pd.py
@@ -42,8 +42,8 @@ class Decoder(srd.Decoder):
         ('bit-warnings', 'Bit warnings'),
     )
     annotation_rows = (
-        ('bits', 'Bits', (134, 135)),
-        ('cmd-reply', 'Commands/replies', tuple(range(134))),
+        ('bits', 'Bits', (133, 134)),
+        ('cmd-reply', 'Commands/replies', tuple(range(133))),
     )
 
     def __init__(self):
@@ -147,7 +147,6 @@ class Decoder(srd.Decoder):
 
         # Bits[0:0]: End bit (always 1)
         bit, self.ss_bit, self.es_bit = tb(0, 0)[0], tb(0, 0)[1], tb(0, 0)[2]
-        self.putb([134, ['End bit: %d' % bit]])
         if bit == 1:
             self.putb([134, ['End bit: %d' % bit]])
         else:
@@ -227,7 +226,7 @@ class Decoder(srd.Decoder):
         self.state = 'GET RESPONSE R1'
 
     def handle_cmd24(self):
-        # CMD24: WRITE_SINGLE_BLOCK
+        # CMD24: WRITE_BLOCK
         self.putc(24, 'Write a block to address 0x%04x' % self.arg)
         self.is_cmd24 = True
         self.state = 'GET RESPONSE R1'
@@ -378,24 +377,35 @@ class Decoder(srd.Decoder):
             self.read_buf = []
             self.state = 'DATA RESPONSE'
         elif mosi == 0xfe:
-            self.put(self.ss, self.es, self.out_ann, [24, ['Data Start Token']])
+            self.put(self.ss, self.es, self.out_ann, [24, ['Start Block']])
             self.cmd24_start_token_found = True
 
     def handle_data_response(self, miso):
+        # Data Response token (1 byte).
+        #
+        # Format:
+        #  - Bits[7:5]: Don't care.
+        #  - Bits[4:4]: Always 0.
+        #  - Bits[3:1]: Status.
+        #    - 010: Data accepted.
+        #    - 101: Data rejected due to a CRC error.
+        #    - 110: Data rejected due to a write error.
+        #  - Bits[0:0]: Always 1.
         miso &= 0x1f
         if miso & 0x11 != 0x01:
             # This is not the byte we are waiting for.
             # Should we return to IDLE here?
             return
-        self.put(self.miso_bits[7][1], self.miso_bits[5][2], self.out_ann, [134, ['don\'t care']])
-        self.put(self.miso_bits[4][1], self.miso_bits[4][2], self.out_ann, [134, ['0']])
+        m = self.miso_bits
+        self.put(m[7][1], m[5][2], self.out_ann, [134, ['Don\'t care']])
+        self.put(m[4][1], m[4][2], self.out_ann, [134, ['Always 0']])
         if miso == 0x05:
-            self.put(self.miso_bits[3][1], self.miso_bits[1][2], self.out_ann, [134, ['Data accepted']])
+            self.put(m[3][1], m[1][2], self.out_ann, [134, ['Data accepted']])
         elif miso == 0x0b:
-            self.put(self.miso_bits[3][1], self.miso_bits[1][2], self.out_ann, [134, ['Data rejected (CRC error)']])
+            self.put(m[3][1], m[1][2], self.out_ann, [134, ['Data rejected (CRC error)']])
         elif miso == 0x0d:
-            self.put(self.miso_bits[3][1], self.miso_bits[1][2], self.out_ann, [134, ['Data rejected (write error)']])
-        self.put(self.miso_bits[0][1], self.miso_bits[0][2], self.out_ann, [134, ['1']])
+            self.put(m[3][1], m[1][2], self.out_ann, [134, ['Data rejected (write error)']])
+        self.put(m[0][1], m[0][2], self.out_ann, [134, ['Always 1']])
         ann_class = None
         if self.is_cmd24:
             ann_class = 24