import re
import sigrokdecode as srd
+from common.srdhelper import SrdIntEnum
+
+Pin = SrdIntEnum.from_str('Pin', 'CLK DATA CE')
ann_cmdbit, ann_databit, ann_cmd, ann_data, ann_warning = range(5)
desc = 'Serial nonvolatile 1-Kbit EEPROM.'
license = 'gplv2+'
inputs = ['logic']
- outputs = ['sda2506']
+ outputs = []
tags = ['IC', 'Memory']
channels = (
{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
('cmdbit', 'Command bit'),
('databit', 'Data bit'),
('cmd', 'Command'),
- ('data', 'Data byte'),
- ('warnings', 'Human-readable warnings'),
+ ('databyte', 'Data byte'),
+ ('warning', 'Warning'),
)
annotation_rows = (
('bits', 'Bits', (ann_cmdbit, ann_databit)),
- ('commands', 'Commands', (ann_cmd,)),
('data', 'Data', (ann_data,)),
+ ('commands', 'Commands', (ann_cmd,)),
('warnings', 'Warnings', (ann_warning,)),
)
def decode(self):
while True:
- # Wait for CLK edge or CE edge.
- clk, d, ce = self.wait([{0: 'e'}, {2: 'e'}])
+ # Wait for CLK edge or CE# edge.
+ clk, d, ce = self.wait([{Pin.CLK: 'e'}, {Pin.CE: 'e'}])
if self.matched[0] and ce == 1 and clk == 1:
# Rising clk edge and command mode.