ntf905: Add/rename required self.reset() method.

[libsigrokdecode.git] / decoders / mcs48 / pd.py

diff --git a/decoders/mcs48/pd.py b/decoders/mcs48/pd.py
index e80b8e5e216c2b52e4e9b2e633aa341c0e953501..8c52de93e5b1af6f4bfc8e8c17f63d9b054d0ea1 100644 (file)
--- a/decoders/mcs48/pd.py
+++ b/decoders/mcs48/pd.py
@@ -18,6 +18,10 @@
 ##
 
 import sigrokdecode as srd
+from common.srdhelper import SrdIntEnum
+
+Ann = SrdIntEnum.from_str('Ann', 'ROMDATA')
+Bin = SrdIntEnum.from_str('Bin', 'ROMDATA')
 
 class ChannelError(Exception):
     pass
@@ -30,7 +34,7 @@ class Decoder(srd.Decoder):
     desc = 'Intel MCS-48 external memory access protocol.'
     license = 'gplv2+'
     inputs = ['logic']
-    outputs = ['mcs48']
+    outputs = []
     tags = ['Retro computing']
     channels = (
         {'id': 'ale', 'name': 'ALE', 'desc': 'Address latch enable'},
@@ -95,10 +99,10 @@ class Decoder(srd.Decoder):
         self.data_s = self.samplenum
         if self.started:
             anntext = '{:04X}:{:02X}'.format(self.addr, self.data)
-            self.put(self.addr_s, self.data_s, self.out_ann, [0, [anntext]])
+            self.put(self.addr_s, self.data_s, self.out_ann, [Ann.ROMDATA, [anntext]])
             bindata = self.addr.to_bytes(2, byteorder='big')
             bindata += self.data.to_bytes(1, byteorder='big')
-            self.put(self.addr_s, self.data_s, self.out_bin, [0, bindata])
+            self.put(self.addr_s, self.data_s, self.out_bin, [Bin.ROMDATA, bindata])
 
     def decode(self):
         # Address bits above A11 are optional, and are considered to be A12+.