ssi32: rename reset() helper method

[libsigrokdecode.git] / decoders / i2c / pd.py

diff --git a/decoders/i2c/pd.py b/decoders/i2c/pd.py
index 6172fb438c50f9295c8786fe47d0d9672e4e4f85..d0c2ea71702d20ac247a37739173047cfdce8588 100644 (file)
--- a/decoders/i2c/pd.py
+++ b/decoders/i2c/pd.py
@@ -130,10 +130,6 @@ class Decoder(srd.Decoder):
         self.out_bitrate = self.register(srd.OUTPUT_META,
                 meta=(int, 'Bitrate', 'Bitrate from Start bit to Stop bit'))
 
-        # Assume that the initial SCL/SDA pin state is high (logic 1).
-        # This is a good default, since both pins have pullups as per spec.
-        self.initial_pins = [1, 1]
-
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
 
@@ -257,8 +253,6 @@ class Decoder(srd.Decoder):
         if not self.samplerate:
             raise SamplerateError('Cannot decode without samplerate.')
 
-        self.wait({})
-
         while True:
             # State machine.
             if self.state == 'FIND START':
@@ -272,8 +266,7 @@ class Decoder(srd.Decoder):
                 #  a) Data sampling of receiver: SCL = rising, and/or
                 #  b) START condition (S): SCL = high, SDA = falling, and/or
                 #  c) STOP condition (P): SCL = high, SDA = rising
-                conds = [{0: 'r'}, {0: 'h', 1: 'f'}, {0: 'h', 1: 'r'}]
-                pins = self.wait(conds[:]) # TODO
+                pins = self.wait([{0: 'r'}, {0: 'h', 1: 'f'}, {0: 'h', 1: 'r'}])
 
                 # Check which of the condition(s) matched and handle them.
                 if self.matched[0]: