adf435x: Add warning on frame size mismatch

[libsigrokdecode.git] / decoders / adf435x / pd.py

diff --git a/decoders/adf435x/pd.py b/decoders/adf435x/pd.py
index f6c6e6e01f99e66f5a5659a16dc1ee873ca60740..e3d51a9d979c288dd3e953cae67986a5416c31e6 100644 (file)
--- a/decoders/adf435x/pd.py
+++ b/decoders/adf435x/pd.py
@@ -86,6 +86,7 @@ regs = {
 }
 
 ANN_REG = 0
+ANN_WARN = 1
 
 class Decoder(srd.Decoder):
     api_version = 3
@@ -99,10 +100,12 @@ class Decoder(srd.Decoder):
     tags = ['Clock/timing', 'IC', 'Wireless/RF']
     annotations = (
         # Sent from the host to the chip.
-        ('register', 'Register written to the device'),
+        ('write', 'Register write'),
+        ('warning', "Warnings"),
     )
     annotation_rows = (
-        ('registers', 'Register writes', (ANN_REG,)),
+        ('writes', 'Register writes', (ANN_REG,)),
+        ('warnings', 'Warnings', (ANN_WARN,)),
     )
 
     def __init__(self):
@@ -110,6 +113,7 @@ class Decoder(srd.Decoder):
 
     def reset(self):
         self.bits = []
+        self.packet_start = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
@@ -126,10 +130,11 @@ class Decoder(srd.Decoder):
 
     def decode(self, ss, es, data):
 
-        ptype, data1, data2 = data
+        ptype, _, _ = data
 
         if ptype == 'CS-CHANGE':
-            if data1 == 1:
+            _, cs_before, cs_after = data
+            if cs_before == 1:
                 if len(self.bits) == 32:
                     reg_value, reg_pos = self.decode_bits(0, 3)
                     self.put(reg_pos[0], reg_pos[1], self.out_ann, [ANN_REG,
@@ -139,6 +144,14 @@ class Decoder(srd.Decoder):
                         field_descs = regs[reg_value]
                         for field_desc in field_descs:
                             field = self.decode_field(*field_desc)
+                else:
+                    error = "Frame error: Wrong number of bits: got %d expected 32" % len(self.bits)
+                    self.put(self.packet_start, es, self.out_ann, [ANN_WARN, [error, 'Frame error']])
                 self.bits = []
+            else:
+                # Start of a new register write packet
+                self.packet_start = ss
+
         if ptype == 'BITS':
-            self.bits = data1 + self.bits
+            _, mosi_bits, miso_bits = data
+            self.bits = mosi_bits + self.bits