+ uint32_t val;
+};
+
+/** LWLA sample acquisition and decompression state. */
+struct acquisition_state {
+ uint64_t samples_max; /* maximum number of samples to process */
+ uint64_t samples_done; /* number of samples sent to the session bus */
+ uint64_t duration_max; /* maximum capture duration in milliseconds */
+ uint64_t duration_now; /* running capture duration since trigger */
+
+ uint64_t sample; /* last sample read from capture memory */
+ uint64_t run_len; /* remaining run length of current sample */
+
+ struct libusb_transfer *xfer_in; /* USB in transfer record */
+ struct libusb_transfer *xfer_out; /* USB out transfer record */
+
+ unsigned int mem_addr_fill; /* capture memory fill level */
+ unsigned int mem_addr_done; /* next address to be processed */
+ unsigned int mem_addr_next; /* start address for next async read */
+ unsigned int mem_addr_stop; /* end of memory range to be read */
+ unsigned int in_index; /* position in read transfer buffer */
+ unsigned int out_index; /* position in logic packet buffer */
+ enum rle_state rle; /* RLE decoding state */
+
+ gboolean rle_enabled; /* capturing in timing-state mode */
+ gboolean clock_boost; /* switch to faster clock during capture */
+ unsigned int status; /* last received device status */
+
+ unsigned int reg_seq_pos; /* index of next register/value pair */
+ unsigned int reg_seq_len; /* length of register/value sequence */
+
+ struct regval reg_sequence[MAX_REG_SEQ_LEN]; /* register buffer */
+ uint32_t xfer_buf_in[MAX_ACQ_RECV_LEN32]; /* USB in buffer */
+ uint16_t xfer_buf_out[MAX_ACQ_SEND_LEN16]; /* USB out buffer */
+ uint8_t out_packet[PACKET_SIZE]; /* logic payload */