-#define LA2016_BULK_MAX 8388608
-
-#define MAX_RENUM_DELAY_MS 3000
-#define DEFAULT_TIMEOUT_MS 200
-
-#define LA2016_THR_VOLTAGE_MIN 0.40
-#define LA2016_THR_VOLTAGE_MAX 4.00
-
-#define LA2016_NUM_SAMPLES_MIN 256
-#define LA2016_NUM_SAMPLES_MAX (10UL * 1000 * 1000 * 1000)
-
-typedef struct pwm_setting_dev {
- uint32_t period;
- uint32_t duty;
-} __attribute__((__packed__)) pwm_setting_dev_t;
-
-typedef struct trigger_cfg {
- uint32_t channels;
- uint32_t enabled;
- uint32_t level;
- uint32_t high_or_falling;
-} __attribute__((__packed__)) trigger_cfg_t;
-
-typedef struct sample_config {
- uint32_t sample_depth;
- uint32_t psa;
- uint16_t u1;
- uint32_t u2;
- uint16_t clock_divisor;
-} __attribute__((__packed__)) sample_config_t;
-
-typedef struct capture_info {
- uint32_t n_rep_packets;
- uint32_t n_rep_packets_before_trigger;
- uint32_t write_pos;
-} __attribute__((__packed__)) capture_info_t;
-
-typedef struct acq_packet {
- uint16_t state;
- uint8_t repetitions;
-} __attribute__((__packed__)) acq_packet_t;
-
-typedef struct transfer_packet {
- acq_packet_t packet[5];
- uint8_t seq;
-} __attribute__((__packed__)) transfer_packet_t;
-
-typedef struct pwm_setting {
- uint8_t enabled;
- float freq;
- float duty;
- pwm_setting_dev_t dev;
-} pwm_setting_t;
+/*
+ * Check for MCU firmware to take effect after upload. Check the device
+ * presence for a maximum period of time, delay between checks in that
+ * phase. Allow for the device to vanish after upload and before checks,
+ * to not mistake its earlier incarnation for the successful operation
+ * of the most recently loaded firmware.
+ */
+#define RENUM_CHECK_PERIOD_MS 3000
+#define RENUM_GONE_DELAY_MS 1800
+#define RENUM_POLL_INTERVAL_MS 200
+
+/*
+ * The device expects some zero padding to follow the content of the
+ * file which contains the FPGA bitstream. Specify the chunk size here.
+ */
+#define LA2016_EP2_PADDING 2048
+
+/*
+ * Whether the logic input threshold voltage is a config item of the
+ * "Logic" channel group or a global config item of the device. Ideally
+ * it would be the former (being strictly related to the Logic channels)
+ * but mainline applications work better with the latter, and many other
+ * device drivers implement it that way, too.
+ */
+#define WITH_THRESHOLD_DEVCFG 1
+
+#define LA2016_THR_VOLTAGE_MIN 0.40
+#define LA2016_THR_VOLTAGE_MAX 4.00
+
+/* Properties related to the layout of capture data downloads. */
+#define TRANSFER_PACKET_LENGTH 16
+#define LA2016_NUM_SAMPLES_MAX (UINT64_C(10 * 1000 * 1000 * 1000))
+
+/* Maximum device capabilities. May differ between models. */
+#define MAX_PWM_FREQ SR_MHZ(20)
+#define PWM_CLOCK SR_MHZ(200) /* 200MHz for both LA2016 and LA1016 */
+
+#define LA2016_NUM_PWMCH_MAX 2
+
+/* Streaming mode related thresholds. Not enforced, used for warnings. */
+#define LA2016_STREAM_MBPS_MAX 200 /* In units of Mbps. */
+#define LA2016_STREAM_PUSH_THR 16 /* In units of Mbps. */
+#define LA2016_STREAM_PUSH_IVAL 250 /* In units of ms. */
+
+/*
+ * Whether to de-initialize the device hardware in the driver's close
+ * callback. It is desirable to e.g. configure PWM channels and leave
+ * the generator running after the application shuts down. Users can
+ * always disable channels on their way out if they want to.
+ */
+#define WITH_DEINIT_IN_CLOSE 0
+
+#define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024)
+
+struct kingst_model {
+ uint8_t magic; /* EEPROM magic byte value. */
+ const char *name; /* User perceived model name. */
+ const char *fpga_stem; /* Bitstream filename stem. */
+ uint64_t samplerate; /* Max samplerate in Hz. */
+ size_t channel_count; /* Max channel count (16, 32). */
+ uint64_t memory_bits; /* RAM capacity in Gbit (1, 2, 4). */
+};