+ /*
+ * The acquisition configuration communicates "pre-trigger"
+ * specs in several formats. sigrok users provide a percentage
+ * (0-100%), which translates to a pre-trigger samples count
+ * (assuming that a total samples count limit was specified).
+ * The device supports hardware compression, which depends on
+ * slowly changing input data to be effective. Fast changing
+ * input data may occupy more space in sample memory than its
+ * uncompressed form would. This is why a third parameter can
+ * limit the amount of sample memory to use for pre-trigger
+ * data. Only the upper 24 bits of that memory size spec get
+ * communicated to the device (written to its FPGA register).
+ */
+ pre_trigger_samples = devc->limit_samples * devc->capture_ratio / 100;
+ pre_trigger_memory = LA2016_PRE_MEM_LIMIT_BASE;
+ pre_trigger_memory *= devc->capture_ratio;
+ pre_trigger_memory /= 100;