+static const uint32_t scanopts[] = {
+ SR_CONF_CONN,
+};
+
+static const uint32_t drvopts[] = {
+ SR_CONF_OSCILLOSCOPE,
+};
+
+static const uint32_t devopts[] = {
+ SR_CONF_CONN | SR_CONF_GET,
+ SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_NUM_VDIV | SR_CONF_GET,
+};
+
+static const uint32_t devopts_cg[] = {
+ SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+};
+
+static const char *channel_names[] = {
+ "CH1", "CH2",
+};
+
+static const char *dc_coupling[] = {
+ "DC",
+};
+
+static const char *acdc_coupling[] = {
+ "AC", "DC",
+};
+
+static const uint64_t vdivs[][2] = {
+ VDIV_VALUES
+};
+
+static const uint64_t vdivs_instrustar[][2] = {
+ VDIV_VALUES_INSTRUSTAR
+};
+
+static const uint64_t samplerates[] = {
+ SAMPLERATE_VALUES
+};
+
+static const struct hantek_6xxx_profile dev_profiles[] = {
+ {
+ /* Windows: "Hantek6022BE DRIVER 1": 04b4:6022 */
+ 0x04b4, 0x6022, 0x1d50, 0x608e, 0x0001,
+ "Hantek", "6022BE", "fx2lafw-hantek-6022be.fw",
+ ARRAY_AND_SIZE(dc_coupling), FALSE,
+ ARRAY_AND_SIZE(vdivs),
+ },
+ {
+ /* Windows: "Hantek6022BE DRIVER 2": 04b5:6022 */
+ 0x04b5, 0x6022, 0x1d50, 0x608e, 0x0001,
+ "Hantek", "6022BE", "fx2lafw-hantek-6022be.fw",
+ ARRAY_AND_SIZE(dc_coupling), FALSE,
+ ARRAY_AND_SIZE(vdivs),
+ },
+ {
+ 0x8102, 0x8102, 0x1d50, 0x608e, 0x0002,
+ "Sainsmart", "DDS120", "fx2lafw-sainsmart-dds120.fw",
+ ARRAY_AND_SIZE(acdc_coupling), TRUE,
+ ARRAY_AND_SIZE(vdivs),
+ },
+ {
+ /* Windows: "Hantek6022BL DRIVER 1": 04b4:602a */
+ 0x04b4, 0x602a, 0x1d50, 0x608e, 0x0003,
+ "Hantek", "6022BL", "fx2lafw-hantek-6022bl.fw",
+ ARRAY_AND_SIZE(dc_coupling), FALSE,
+ ARRAY_AND_SIZE(vdivs),
+ },
+ {
+ /* Windows: "Hantek6022BL DRIVER 2": 04b5:602a */
+ 0x04b5, 0x602a, 0x1d50, 0x608e, 0x0003,
+ "Hantek", "6022BL", "fx2lafw-hantek-6022bl.fw",
+ ARRAY_AND_SIZE(dc_coupling), FALSE,
+ ARRAY_AND_SIZE(vdivs),
+ },
+ {
+ 0xd4a2, 0x5660, 0x1d50, 0x608e, 0x0004,
+ "YiXingDianZi", "MDSO", "fx2lafw-yixingdianzi-mdso.fw",
+ ARRAY_AND_SIZE(dc_coupling), FALSE,
+ ARRAY_AND_SIZE(vdivs),
+ },
+ {
+ /*"InstrustarISDS205": d4a2:5661 */
+ 0xd4a2, 0x5661, 0x1d50, 0x608e, 0x0005,
+ "Instrustar", "ISDS205B", "fx2lafw-instrustar-isds205b.fw",
+ ARRAY_AND_SIZE(acdc_coupling), TRUE,
+ ARRAY_AND_SIZE(vdivs_instrustar),
+ },
+ ALL_ZERO
+};
+
+
+static int read_channel(const struct sr_dev_inst *sdi, uint32_t amount);
+
+static struct sr_dev_inst *hantek_6xxx_dev_new(const struct hantek_6xxx_profile *prof)