+ /* Reserved for plugin features. See above. */
+};
+
+#define HI4(b) (((b) >> 4) & 0x0f)
+#define LO4(b) (((b) >> 0) & 0x0f)
+
+#define BIT_MASK(l) ((1UL << (l)) - 1)
+
+#define CLKSEL_CLKSEL8 (1 << 0)
+#define CLKSEL_PINMASK BIT_MASK(4)
+#define CLKSEL_RISING (1 << 4)
+#define CLKSEL_FALLING (1 << 5)
+
+#define TRGSEL_SELINC_MASK BIT_MASK(2)
+#define TRGSEL_SELINC_SHIFT 0
+#define TRGSEL_SELRES_MASK BIT_MASK(2)
+#define TRGSEL_SELRES_SHIFT 2
+#define TRGSEL_SELA_MASK BIT_MASK(2)
+#define TRGSEL_SELA_SHIFT 4
+#define TRGSEL_SELB_MASK BIT_MASK(2)
+#define TRGSEL_SELB_SHIFT 6
+#define TRGSEL_SELC_MASK BIT_MASK(2)
+#define TRGSEL_SELC_SHIFT 8
+#define TRGSEL_SELPRESC_MASK BIT_MASK(4)
+#define TRGSEL_SELPRESC_SHIFT 12
+
+enum trgsel_selcode_t {
+ TRGSEL_SELCODE_LEVEL = 0,
+ TRGSEL_SELCODE_FALL = 1,
+ TRGSEL_SELCODE_RISE = 2,
+ TRGSEL_SELCODE_EVENT = 3,
+ TRGSEL_SELCODE_NEVER = 3,