+ /*
+ * Limit readcount to prevent reading past the end of the hardware
+ * buffer.
+ */
+ readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
+
+ memset(trigger_config, 0, 16);
+ trigger_config[devc->num_stages - 1] |= 0x08;
+ if (devc->trigger_mask[0]) {
+ delaycount = readcount * (1 - devc->capture_ratio / 100.0);
+ devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
+
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0,
+ reverse32(devc->trigger_mask[0])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0,
+ reverse32(devc->trigger_value[0])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0,
+ trigger_config[0]) != SR_OK)
+ return SR_ERR;
+
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_1,
+ reverse32(devc->trigger_mask[1])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_1,
+ reverse32(devc->trigger_value[1])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_1,
+ trigger_config[1]) != SR_OK)
+ return SR_ERR;
+
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_2,
+ reverse32(devc->trigger_mask[2])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_2,
+ reverse32(devc->trigger_value[2])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_2,
+ trigger_config[2]) != SR_OK)
+ return SR_ERR;
+
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_3,
+ reverse32(devc->trigger_mask[3])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_3,
+ reverse32(devc->trigger_value[3])) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_3,
+ trigger_config[3]) != SR_OK)
+ return SR_ERR;
+ } else {
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0,
+ devc->trigger_mask[0]) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0,
+ devc->trigger_value[0]) != SR_OK)
+ return SR_ERR;
+ if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0,
+ 0x00000008) != SR_OK)
+ return SR_ERR;
+ delaycount = readcount;
+ }
+
+ sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
+ "demux %s)", devc->cur_samplerate, devc->cur_samplerate_divider,
+ devc->flag_reg & FLAG_DEMUX ? "on" : "off");
+ if (send_longcommand(devc->serial, CMD_SET_DIVIDER,
+ reverse32(devc->cur_samplerate_divider)) != SR_OK)
+ return SR_ERR;