- ops[0] = mso_trans(5, devc->la_trigger);
- ops[1] = mso_trans(6, devc->la_trigger_mask);
- ops[2] = mso_trans(3, dso_trigger & 0xff);
- ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
- ops[4] = mso_trans(11,
+ switch (devc->trigger_chan) {
+ case 0:
+ trigger_config |= 0x00; //DSO level trigger //b00000000
+ break;
+ case 1:
+ trigger_config |= 0x20; //DSO level trigger & width < trigger_width
+ break;
+ case 2:
+ trigger_config |= 0x40; //DSO level trigger & width >= trigger_width
+ break;
+ case 3:
+ trigger_config |= 0x60; //LA combination trigger
+ break;
+ }
+
+ //Last bit of trigger config reg 4 needs to be 1 for trigger enable,
+ //otherwise the trigger is not enabled
+ if (devc->use_trigger)
+ trigger_config |= 0x80;
+
+ uint16_t ops[18];
+ ops[0] = mso_trans(3, threshold_value & 0xff);
+ //The trigger_config also holds the 2 MSB bits from the threshold value
+ ops[1] = mso_trans(4, trigger_config | (threshold_value >> 8) & 0x03);
+ ops[2] = mso_trans(5, devc->la_trigger);
+ ops[3] = mso_trans(6, devc->la_trigger_mask);
+ ops[4] = mso_trans(7, devc->trigger_holdoff[0]);
+ ops[5] = mso_trans(8, devc->trigger_holdoff[1]);
+
+ ops[6] = mso_trans(11,