+/* possibly bank agnostic: */
+#define REG_CTL1 14
+
+/* bank 2 registers (SPI/I2C protocol trigger) */
+#define REG_PT_WORD(x) (x)
+#define REG_PT_MASK(x) (x+4)
+#define REG_PT_SPIMODE 8
+
+/* bits - REG_CTL1 */
+#define BIT_CTL1_RESETFSM (1 << 0)
+#define BIT_CTL1_ARM (1 << 1)
+#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
+#define BIT_CTL1_RESETADC (1 << 6)
+#define BIT_CTL1_LED (1 << 7)