+ sigma_write_trigger_lut(&lut, devc);
+
+ triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
+ }
+
+ /* Setup trigger in and out pins to default values. */
+ memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
+ triggerinout_conf.trgout_bytrigger = 1;
+ triggerinout_conf.trgout_enable = 1;
+
+ sigma_write_register(WRITE_TRIGGER_OPTION,
+ (uint8_t *) &triggerinout_conf,
+ sizeof(struct triggerinout), devc);
+
+ /* Go back to normal mode. */
+ sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
+
+ /* Set clock select register. */
+ if (devc->cur_samplerate == SR_MHZ(200))
+ /* Enable 4 probes. */
+ sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, devc);
+ else if (devc->cur_samplerate == SR_MHZ(100))
+ /* Enable 8 probes. */
+ sigma_set_register(WRITE_CLOCK_SELECT, 0x00, devc);
+ else {
+ /*
+ * 50 MHz mode (or fraction thereof). Any fraction down to
+ * 50 MHz / 256 can be used, but is not supported by sigrok API.
+ */
+ frac = SR_MHZ(50) / devc->cur_samplerate - 1;
+
+ clockselect.async = 0;
+ clockselect.fraction = frac;
+ clockselect.disabled_probes = 0;
+
+ sigma_write_register(WRITE_CLOCK_SELECT,
+ (uint8_t *) &clockselect,
+ sizeof(clockselect), devc);
+ }
+
+ /* Setup maximum post trigger time. */
+ sigma_set_register(WRITE_POST_TRIGGER,
+ (devc->capture_ratio * 255) / 100, devc);
+
+ /* Start acqusition. */
+ gettimeofday(&devc->start_tv, 0);
+ sigma_set_register(WRITE_MODE, 0x0d, devc);
+
+ devc->cb_data = cb_data;