+ self.state[rxtx] = 'WAIT FOR START BIT'
+
+ def get_wait_cond(self, rxtx, inv):
+ # Return condititions that are suitable for Decoder.wait(). Those
+ # conditions either match the falling edge of the START bit, or
+ # the sample point of the next bit time.
+ state = self.state[rxtx]
+ if state == 'WAIT FOR START BIT':
+ return {rxtx: 'r' if inv else 'f'}
+ if state == 'GET START BIT':
+ bitnum = 0
+ elif state == 'GET DATA BITS':
+ bitnum = 1 + self.cur_data_bit[rxtx]
+ elif state == 'GET PARITY BIT':
+ bitnum = 1 + self.options['num_data_bits']
+ elif state == 'GET STOP BITS':
+ bitnum = 1 + self.options['num_data_bits']
+ bitnum += 0 if self.options['parity_type'] == 'none' else 1
+ want_num = ceil(self.get_sample_point(rxtx, bitnum))
+ return {'skip': want_num - self.samplenum}
+
+ def inspect_sample(self, rxtx, signal, inv):
+ # Inspect a sample returned by .wait() for the specified UART line.
+ if inv:
+ signal = not signal
+
+ state = self.state[rxtx]
+ if state == 'WAIT FOR START BIT':
+ self.wait_for_start_bit(rxtx, signal)
+ elif state == 'GET START BIT':
+ self.get_start_bit(rxtx, signal)
+ elif state == 'GET DATA BITS':
+ self.get_data_bits(rxtx, signal)
+ elif state == 'GET PARITY BIT':
+ self.get_parity_bit(rxtx, signal)
+ elif state == 'GET STOP BITS':
+ self.get_stop_bits(rxtx, signal)
+
+ def decode(self):