+ [0, ['DAC value: %d' % self.dac_value]])
+
+ def handle_falling_edge_load(self):
+ self.put(self.samplenum, self.samplenum, self.out_ann,
+ [0, ['Setting %s value to %d (x%d gain)' % \
+ (self.dac_select, self.dac_value, self.gain)]])
+
+ def handle_falling_edge_ldac(self):
+ self.put(self.samplenum, self.samplenum, self.out_ann,
+ [0, ['Falling edge on LDAC pin']])
+
+ def handle_new_dac_bit(self):
+ self.bits.append(self.datapin)
+
+ # Wait until we have read 11 bits, then parse them.
+ l, s = len(self.bits), self.samplenum
+ if l == 1:
+ self.ss_dac = s
+ elif l == 2:
+ self.es_dac = self.ss_gain = s
+ elif l == 3:
+ self.es_gain = self.ss_value = s
+ elif l == 11:
+ self.es_value = s
+ self.handle_11bits()
+ self.bits = []