- outputs = ['rtc8564']
- optional_probes = [
- {'id': 'clkout', 'name': 'CLKOUT', 'desc': 'Clock output'},
- {'id': 'clkoe', 'name': 'CLKOE', 'desc': 'Clock output enable'},
- {'id': 'int', 'name': 'INT#', 'desc': 'Interrupt'},
- ]
- annotations = \
- [['reg-0x%02x' % i, 'Register 0x%02x' % i] for i in range(8 + 1)] + [
- ['read', 'Read date/time'],
- ['write', 'Write date/time'],
- ['bit-reserved', 'Reserved bit'],
- ['bit-vl', 'VL bit'],
- ['bit-century', 'Century bit'],
- ['reg-read', 'Register read'],
- ['reg-write', 'Register write'],
- ]
+ outputs = []
+ tags = ['Clock/timing']
+ annotations = reg_list() + (
+ ('read', 'Read date/time'),
+ ('write', 'Write date/time'),
+ ('bit-reserved', 'Reserved bit'),
+ ('bit-vl', 'VL bit'),
+ ('bit-century', 'Century bit'),
+ ('reg-read', 'Register read'),
+ ('reg-write', 'Register write'),
+ )