#include "protocol.h"
-#define USB_VENDOR_ID 0x0403
-#define USB_DEVICE_ID 0x6010
-#define USB_VENDOR_NAME "Saanlima"
-#define USB_IPRODUCT "Pipistrello LX45"
-
-static const int32_t hwcaps[] = {
+static const uint32_t devopts[] = {
SR_CONF_LOGIC_ANALYZER,
- SR_CONF_SAMPLERATE,
- SR_CONF_TRIGGER_TYPE,
- SR_CONF_CAPTURE_RATIO,
- SR_CONF_LIMIT_SAMPLES,
- SR_CONF_PATTERN_MODE,
- SR_CONF_EXTERNAL_CLOCK,
- SR_CONF_SWAP,
- SR_CONF_RLE,
+ SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
+ SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_SWAP | SR_CONF_SET,
+ SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
+};
+
+static const int32_t trigger_matches[] = {
+ SR_TRIGGER_ZERO,
+ SR_TRIGGER_ONE,
+ SR_TRIGGER_RISING,
+ SR_TRIGGER_FALLING,
};
#define STR_PATTERN_NONE "None"
devices = NULL;
/* Allocate memory for our private device context. */
- if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
- sr_err("Device context malloc failed.");
- goto err_free_nothing;
- }
+ devc = g_malloc0(sizeof(struct dev_context));
/* Device-specific settings */
- devc->max_samples = devc->max_samplerate = devc->protocol_version = 0;
+ devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
/* Acquisition settings */
devc->limit_samples = devc->capture_ratio = 0;
/* Parse the metadata. */
sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
- sdi->index = 0;
/* Configure samplerate and divider. */
if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
sr_dbg("Failed to set default samplerate (%"PRIu64").",
DEFAULT_SAMPLERATE);
- /* Clear trigger masks, values and stages. */
- p_ols_configure_channels(sdi);
drvc->instances = g_slist_append(drvc->instances, sdi);
devices = g_slist_append(devices, sdi);
g_free(devc->ftdi_buf);
err_free_devc:
g_free(devc);
-err_free_nothing:
return NULL;
}
}
-static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
+static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
struct dev_context *devc;
return SR_ERR_ARG;
devc = sdi->priv;
- switch (id) {
+ switch (key) {
case SR_CONF_SAMPLERATE:
*data = g_variant_new_uint64(devc->cur_samplerate);
break;
return SR_OK;
}
-static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
+static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
struct dev_context *devc;
devc = sdi->priv;
- switch (id) {
+ switch (key) {
case SR_CONF_SAMPLERATE:
tmp_u64 = g_variant_get_uint64(data);
if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
return ret;
}
-static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
+static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
struct dev_context *devc;
GVariant *gvar, *grange[2];
GVariantBuilder gvb;
- int num_channels, i;
+ int num_pols_changrp, i;
(void)cg;
switch (key) {
case SR_CONF_DEVICE_OPTIONS:
- *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
- hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
+ *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
+ devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
break;
case SR_CONF_SAMPLERATE:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
*data = g_variant_builder_end(&gvb);
break;
- case SR_CONF_TRIGGER_TYPE:
- *data = g_variant_new_string(TRIGGER_TYPE);
+ case SR_CONF_TRIGGER_MATCH:
+ *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
+ trigger_matches, ARRAY_SIZE(trigger_matches),
+ sizeof(int32_t));
break;
case SR_CONF_PATTERN_MODE:
*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
devc = sdi->priv;
if (devc->flag_reg & FLAG_RLE)
return SR_ERR_NA;
- if (devc->max_samples == 0)
+ if (devc->max_samplebytes == 0)
/* Device didn't specify sample memory size in metadata. */
return SR_ERR_NA;
/*
* Channel groups are turned off if no channels in that group are
* enabled, making more room for samples for the enabled group.
*/
- p_ols_configure_channels(sdi);
- num_channels = 0;
+ pols_channel_mask(sdi);
+ num_pols_changrp = 0;
for (i = 0; i < 4; i++) {
if (devc->channel_mask & (0xff << (i * 8)))
- num_channels++;
- }
- if (num_channels == 0) {
- /* This can happen, but shouldn't cause too much drama.
- * However we can't continue because the code below would
- * divide by zero. */
- break;
+ num_pols_changrp++;
}
+ /* 3 channel groups takes as many bytes as 4 channel groups */
+ if (num_pols_changrp == 3)
+ num_pols_changrp = 4;
grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
- grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
+ if (num_pols_changrp)
+ grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
+ else
+ grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
*data = g_variant_new_tuple(grange, 2);
break;
default:
static int dev_open(struct sr_dev_inst *sdi)
{
struct dev_context *devc;
- int ret;
devc = sdi->priv;
if (write_longcommand(devc, cmd, arg) != SR_OK)
return SR_ERR;
+ cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
+ arg[0] = devc->trigger_edge[stage] & 0xff;
+ arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
+ arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
+ arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
+ if (write_longcommand(devc, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ return SR_OK;
+}
+
+static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
+{
+ struct dev_context *devc;
+ uint8_t cmd, arg[4];
+
+ devc = sdi->priv;
+
+ cmd = CMD_SET_TRIGGER_MASK + stage * 4;
+ arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
+ if (write_longcommand(devc, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
+ if (write_longcommand(devc, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
+ arg[2] = 0x03;
+ if (write_longcommand(devc, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
+ arg[2] = 0x00;
+ if (write_longcommand(devc, cmd, arg) != SR_OK)
+ return SR_ERR;
+
return SR_OK;
}
{
struct dev_context *devc;
uint32_t samplecount, readcount, delaycount;
- uint8_t changrp_mask, arg[4];
- int num_channels;
+ uint8_t pols_changrp_mask, arg[4];
+ uint16_t flag_tmp;
+ int num_pols_changrp, samplespercount;
int ret, i;
if (sdi->status != SR_ST_ACTIVE)
devc = sdi->priv;
- if (p_ols_configure_channels(sdi) != SR_OK) {
- sr_err("Failed to configure channels.");
- return SR_ERR;
- }
+ pols_channel_mask(sdi);
/*
* Enable/disable channel groups in the flag register according to the
- * channel mask. Calculate this here, because num_channels is needed
- * to limit readcount.
+ * channel mask. Calculate this here, because num_pols_changrp is
+ * needed to limit readcount.
*/
- changrp_mask = 0;
- num_channels = 0;
+ pols_changrp_mask = 0;
+ num_pols_changrp = 0;
for (i = 0; i < 4; i++) {
if (devc->channel_mask & (0xff << (i * 8))) {
- changrp_mask |= (1 << i);
- num_channels++;
+ pols_changrp_mask |= (1 << i);
+ num_pols_changrp++;
}
}
+ /* 3 channel groups takes as many bytes as 4 channel groups */
+ if (num_pols_changrp == 3)
+ num_pols_changrp = 4;
+ /* maximum number of samples (or RLE counts) the buffer memory can hold */
+ devc->max_samples = devc->max_samplebytes / num_pols_changrp;
/*
* Limit readcount to prevent reading past the end of the hardware
*/
sr_dbg("max_samples = %d", devc->max_samples);
sr_dbg("limit_samples = %d", devc->limit_samples);
- samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
- readcount = samplecount / 4;
+ samplecount = MIN(devc->max_samples, devc->limit_samples);
sr_dbg("Samplecount = %d", samplecount);
+ /* In demux mode the OLS is processing two samples per clock */
+ if (devc->flag_reg & FLAG_DEMUX) {
+ samplespercount = 8;
+ }
+ else {
+ samplespercount = 4;
+ }
+
+ readcount = samplecount / samplespercount;
+
/* Rather read too many samples than too few. */
- if (samplecount % 4 != 0)
+ if (samplecount % samplespercount != 0)
readcount++;
/* Basic triggers. */
- if (devc->trigger_mask[0] != 0x00000000) {
- /* At least one channel has a trigger on it. */
+ if (pols_convert_trigger(sdi) != SR_OK) {
+ sr_err("Failed to configure channels.");
+ return SR_ERR;
+ }
+
+ if (devc->num_stages > 0) {
delaycount = readcount * (1 - devc->capture_ratio / 100.0);
- devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
- for (i = 0; i <= devc->num_stages; i++) {
- sr_dbg("Setting stage %d trigger.", i);
- if ((ret = set_trigger(sdi, i)) != SR_OK)
- return ret;
+ devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
+ for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
+ if (i <= devc->num_stages) {
+ sr_dbg("Setting p-ols stage %d trigger.", i);
+ if ((ret = set_trigger(sdi, i)) != SR_OK)
+ return ret;
+ }
+ else {
+ sr_dbg("Disabling p-ols stage %d trigger.", i);
+ if ((ret = disable_trigger(sdi, i)) != SR_OK)
+ return ret;
+ }
}
} else {
/* No triggers configured, force trigger on first stage. */
arg[3] = 0x00;
if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
return SR_ERR;
+
/* Send extended sample limit and pre/post-trigger capture ratio. */
arg[0] = ((readcount - 1) & 0xff);
arg[1] = ((readcount - 1) & 0xff00) >> 8;
arg[2] = ((readcount - 1) & 0xff0000) >> 16;
arg[3] = ((readcount - 1) & 0xff000000) >> 24;
- if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
+ if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
return SR_ERR;
arg[0] = ((delaycount - 1) & 0xff);
arg[1] = ((delaycount - 1) & 0xff00) >> 8;
arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
- if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
+ if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
return SR_ERR;
+
/* Flag register. */
sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
devc->flag_reg & FLAG_FILTER ? "on": "off",
devc->flag_reg & FLAG_DEMUX ? "on" : "off");
- /* 1 means "disable channel". */
- devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
- arg[0] = devc->flag_reg & 0xff;
- arg[1] = devc->flag_reg >> 8;
+ /*
+ * Enable/disable OLS channel groups in the flag register according
+ * to the channel mask. 1 means "disable channel".
+ */
+ devc->flag_reg &= ~0x3c;
+ devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
+ sr_dbg("flag_reg = %x", devc->flag_reg);
+
+ /*
+ * In demux mode the OLS is processing two 8-bit or 16-bit samples
+ * in parallel and for this to work the lower two bits of the four
+ * "channel_disable" bits must be replicated to the upper two bits.
+ */
+ flag_tmp = devc->flag_reg;
+ if (devc->flag_reg & FLAG_DEMUX) {
+ flag_tmp &= ~0x30;
+ flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
+ }
+ arg[0] = flag_tmp & 0xff;
+ arg[1] = flag_tmp >> 8;
arg[2] = arg[3] = 0x00;
if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
return SR_ERR;
std_session_send_df_header(cb_data, LOG_PREFIX);
/* Hook up a dummy handler to receive data from the device. */
- sr_source_add(-1, G_IO_IN, 0, p_ols_receive_data, (void *)sdi);
+ sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data,
+ cb_data);
return SR_OK;
}
write_shortcommand(devc, CMD_RESET);
write_shortcommand(devc, CMD_RESET);
- sr_source_remove(-1);
+ sr_session_source_remove(sdi->session, 0);
/* Send end packet to the session bus. */
sr_dbg("Sending SR_DF_END.");
}
SR_PRIV struct sr_dev_driver p_ols_driver_info = {
- .name = "p_ols",
+ .name = "p-ols",
.longname = "Pipistrello OLS",
.api_version = 1,
.init = init,