license = 'gplv2+'
inputs = ['logic']
outputs = ['tlc5620']
- probes = [
+ channels = (
{'id': 'clk', 'name': 'CLK', 'desc': 'Serial interface clock'},
{'id': 'data', 'name': 'DATA', 'desc': 'Serial interface data'},
- ]
- optional_probes = [
+ )
+ optional_channels = (
{'id': 'load', 'name': 'LOAD', 'desc': 'Serial interface load control'},
{'id': 'ldac', 'name': 'LDAC', 'desc': 'Load DAC'},
- ]
- options = {}
- annotations = [
- ['dac-select', 'DAC select'],
- ['gain', 'Gain'],
- ['value', 'DAC value'],
- ['data-latch', 'Data latch point'],
- ['ldac-fall', 'LDAC falling edge'],
- ]
+ )
+ annotations = (
+ ('dac-select', 'DAC select'),
+ ('gain', 'Gain'),
+ ('value', 'DAC value'),
+ ('data-latch', 'Data latch point'),
+ ('ldac-fall', 'LDAC falling edge'),
+ )
def __init__(self, **kwargs):
self.oldpins = self.oldclk = self.oldload = self.oldldac = None
self.dac_select = self.gain = self.dac_value = None
def start(self):
- # self.out_proto = self.register(srd.OUTPUT_PYTHON)
self.out_ann = self.register(srd.OUTPUT_ANN)
def handle_11bits(self):