2 * This file is part of the libsigrok project.
4 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H
21 #define LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H
26 #include <libsigrok/libsigrok.h>
28 struct sr_usb_dev_inst;
30 /* Rotate argument n bits to the left.
31 * This construct is an idiom recognized by GCC as bit rotation.
33 #define LROTATE(a, n) (((a) << (n)) | ((a) >> (CHAR_BIT * sizeof(a) - (n))))
35 /* Convert 16-bit little endian LWLA protocol word to machine word order. */
36 #define LWLA_TO_UINT16(val) GUINT16_FROM_LE(val)
38 /* Convert 32-bit mixed endian LWLA protocol word to machine word order. */
39 #define LWLA_TO_UINT32(val) LROTATE(GUINT32_FROM_LE(val), 16)
41 /* Convert 16-bit argument to LWLA protocol word. */
42 #define LWLA_WORD(val) GUINT16_TO_LE(val)
44 /* Extract 16-bit units in mixed endian order from 32/64-bit value. */
45 #define LWLA_WORD_0(val) GUINT16_TO_LE(((val) >> 16) & 0xFFFF)
46 #define LWLA_WORD_1(val) GUINT16_TO_LE((val) & 0xFFFF)
47 #define LWLA_WORD_2(val) GUINT16_TO_LE(((val) >> 48) & 0xFFFF)
48 #define LWLA_WORD_3(val) GUINT16_TO_LE(((val) >> 32) & 0xFFFF)
50 /* Maximum number of 16-bit words sent at a time during acquisition.
51 * Used for allocating the libusb transfer buffer. Keep this even so that
52 * subsequent members are always 32-bit aligned.
54 #define MAX_ACQ_SEND_LEN16 64 /* 43 for capture setup plus stuffing */
56 /* Maximum number of 32-bit words received at a time during acquisition.
57 * This is a multiple of the endpoint buffer size to avoid transfer overflow
60 #define MAX_ACQ_RECV_LEN32 (2 * 512 / 4)
62 /* Maximum length of a register read/write sequence.
64 #define MAX_REG_SEQ_LEN 16
66 /* Logic datafeed packet size in bytes.
67 * This is a multiple of both 4 and 5 to match any model's unit size
68 * and memory granularity.
70 #define PACKET_SIZE (5000 * 4 * 5)
72 /** LWLA protocol command ID codes.
83 /** LWLA capture state flags.
84 * The bit positions are the same as in the LWLA1016 control register.
87 STATUS_CAPTURING = 1 << 2,
88 STATUS_TRIGGERED = 1 << 5,
89 STATUS_MEM_AVAIL = 1 << 6,
92 /** LWLA1034 run-length encoding states.
99 /** Register address/value pair.
106 /** LWLA sample acquisition and decompression state.
108 struct acquisition_state {
109 uint64_t samples_max; /* maximum number of samples to process */
110 uint64_t samples_done; /* number of samples sent to the session bus */
111 uint64_t duration_max; /* maximum capture duration in milliseconds */
112 uint64_t duration_now; /* running capture duration since trigger */
114 uint64_t sample; /* last sample read from capture memory */
115 uint64_t run_len; /* remaining run length of current sample */
117 struct libusb_transfer *xfer_in; /* USB in transfer record */
118 struct libusb_transfer *xfer_out; /* USB out transfer record */
120 unsigned int mem_addr_fill; /* capture memory fill level */
121 unsigned int mem_addr_done; /* next address to be processed */
122 unsigned int mem_addr_next; /* start address for next async read */
123 unsigned int mem_addr_stop; /* end of memory range to be read */
124 unsigned int in_index; /* position in read transfer buffer */
125 unsigned int out_index; /* position in logic packet buffer */
126 enum rle_state rle; /* RLE decoding state */
128 gboolean rle_enabled; /* capturing in timing-state mode */
129 gboolean clock_boost; /* switch to faster clock during capture */
130 unsigned int status; /* last received device status */
132 unsigned int reg_seq_pos; /* index of next register/value pair */
133 unsigned int reg_seq_len; /* length of register/value sequence */
135 struct regval reg_sequence[MAX_REG_SEQ_LEN]; /* register buffer */
136 uint32_t xfer_buf_in[MAX_ACQ_RECV_LEN32]; /* USB in buffer */
137 uint16_t xfer_buf_out[MAX_ACQ_SEND_LEN16]; /* USB out buffer */
138 uint8_t out_packet[PACKET_SIZE]; /* logic payload */
141 static inline void lwla_queue_regval(struct acquisition_state *acq,
142 unsigned int reg, uint32_t value)
144 acq->reg_sequence[acq->reg_seq_len].reg = reg;
145 acq->reg_sequence[acq->reg_seq_len].val = value;
149 SR_PRIV int lwla_send_bitstream(struct sr_context *ctx,
150 const struct sr_usb_dev_inst *usb,
153 SR_PRIV int lwla_send_command(const struct sr_usb_dev_inst *usb,
154 const uint16_t *command, int cmd_len);
156 SR_PRIV int lwla_receive_reply(const struct sr_usb_dev_inst *usb,
157 void *reply, int buf_size, int *xfer_len);
159 SR_PRIV int lwla_read_reg(const struct sr_usb_dev_inst *usb,
160 uint16_t reg, uint32_t *value);
162 SR_PRIV int lwla_write_reg(const struct sr_usb_dev_inst *usb,
163 uint16_t reg, uint32_t value);
165 SR_PRIV int lwla_write_regs(const struct sr_usb_dev_inst *usb,
166 const struct regval *regvals, int count);