2 * This file is part of the libsigrok project.
4 * Copyright (C) 2017 Jan Luebbe <jluebbe@lasnet.de>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 #define COMMAND_START_CAPTURE 0x01
25 #define COMMAND_STOP_CAPTURE 0x02
26 #define COMMAND_READ_EEPROM 0x07
27 #define COMMAND_INIT_BITSTREAM 0x7e
28 #define COMMAND_SEND_BITSTREAM 0x7f
29 #define COMMAND_WRITE_REG 0x80
30 #define COMMAND_READ_REG 0x81
31 #define COMMAND_READ_TEMP 0x86
32 #define COMMAND_WRITE_I2C 0x87
33 #define COMMAND_READ_I2C 0x88
34 #define COMMAND_WAKE_I2C 0x89
35 #define COMMAND_READ_FW_VER 0x8b
37 #define REG_ADC_IDX 0x03
38 #define REG_ADC_VAL_LSB 0x04
39 #define REG_ADC_VAL_MSB 0x05
40 #define REG_LED_RED 0x0f
41 #define REG_LED_GREEN 0x10
42 #define REG_LED_BLUE 0x11
43 #define REG_STATUS 0x40
45 static void iterate_lfsr(const struct sr_dev_inst *sdi)
47 struct dev_context *devc = sdi->priv;
48 uint32_t lfsr = devc->lfsr;
51 max = (lfsr & 0x1f) + 34;
52 for (i = 0; i <= max; i++) {
53 lfsr = (lfsr >> 1) | \
60 sr_spew("Iterate 0x%08x -> 0x%08x", devc->lfsr, lfsr);
64 static void encrypt(const struct sr_dev_inst *sdi, const uint8_t *in, uint8_t *out, uint16_t len)
66 struct dev_context *devc = sdi->priv;
67 uint32_t lfsr = devc->lfsr;
71 for (i = 0; i < len; i++) {
73 mask = lfsr >> (i % 4 * 8);
75 value = (value & 0x28) | ((value ^ mask) & ~0x28);
83 static void decrypt(const struct sr_dev_inst *sdi, uint8_t *data, uint16_t len)
85 struct dev_context *devc = sdi->priv;
86 uint32_t lfsr = devc->lfsr;
89 for (i = 0; i < len; i++)
90 data[i] ^= (lfsr >> (i % 4 * 8));
94 static int transact(const struct sr_dev_inst *sdi,
95 const uint8_t *req, uint16_t req_len,
96 uint8_t *rsp, uint16_t rsp_len)
98 struct sr_usb_dev_inst *usb = sdi->conn;
100 uint8_t rsp_dummy[1] = {};
103 if (req_len < 2 || req_len > 1024 || rsp_len > 128 ||
104 !req || (rsp_len > 0 && !rsp))
107 req_enc = g_malloc(req_len);
108 encrypt(sdi, req, req_enc, req_len);
110 ret = libusb_bulk_transfer(usb->devhdl, 1, req_enc, req_len, &xfer, 1000);
112 sr_dbg("Failed to send request 0x%02x: %s.",
113 req[1], libusb_error_name(ret));
116 if (xfer != req_len) {
117 sr_dbg("Failed to send request 0x%02x: incorrect length "
118 "%d != %d.", req[1], xfer, req_len);
122 if (req[0] == 0x20) { /* Reseed. */
124 } else if (rsp_len == 0) {
126 rsp_len = sizeof(rsp_dummy);
129 ret = libusb_bulk_transfer(usb->devhdl, 0x80 | 1, rsp, rsp_len,
132 sr_dbg("Failed to receive response to request 0x%02x: %s.",
133 req[1], libusb_error_name(ret));
136 if (xfer != rsp_len) {
137 sr_dbg("Failed to receive response to request 0x%02x: "
138 "incorrect length %d != %d.", req[1], xfer, rsp_len);
142 decrypt(sdi, rsp, rsp_len);
147 static int reseed(const struct sr_dev_inst *sdi)
149 struct dev_context *devc = sdi->priv;
150 uint8_t req[] = {0x20, 0x24, 0x4b, 0x35, 0x8e};
153 return transact(sdi, req, sizeof(req), NULL, 0);
156 static int write_regs(const struct sr_dev_inst *sdi, uint8_t (*regs)[2], uint8_t cnt)
161 if (cnt < 1 || cnt > 30)
165 req[1] = COMMAND_WRITE_REG;
168 for (i = 0; i < cnt; i++) {
169 req[3 + 2 * i] = regs[i][0];
170 req[4 + 2 * i] = regs[i][1];
173 return transact(sdi, req, 3 + (2 * cnt), NULL, 0);
176 static int write_reg(const struct sr_dev_inst *sdi,
177 uint8_t address, uint8_t value)
179 uint8_t regs[2] = {address, value};
181 return write_regs(sdi, ®s, 1);
184 static int read_regs(const struct sr_dev_inst *sdi,
185 const uint8_t *regs, uint8_t *values,
190 if (cnt < 1 || cnt > 30)
194 req[1] = COMMAND_READ_REG;
197 memcpy(&req[3], regs, cnt);
199 return transact(sdi, req, 3 + cnt, values, cnt);
202 static int read_reg(const struct sr_dev_inst *sdi,
203 uint8_t address, uint8_t *value)
205 return read_regs(sdi, &address, value, 1);
208 static int write_adc(const struct sr_dev_inst *sdi,
209 uint8_t address, uint16_t value)
211 uint8_t regs[][2] = {
212 {REG_ADC_IDX, address},
213 {REG_ADC_VAL_LSB, value},
214 {REG_ADC_VAL_MSB, value >> 8},
217 return write_regs(sdi, ARRAY_AND_SIZE(regs));
220 static int read_eeprom(const struct sr_dev_inst *sdi,
221 uint16_t address, uint8_t *data, uint16_t len)
224 0x00, COMMAND_READ_EEPROM,
225 0x33, 0x81, /* Unknown values */
226 address, address >> 8,
230 return transact(sdi, req, sizeof(req), data, len);
233 static int read_eeprom_serial(const struct sr_dev_inst *sdi,
236 return read_eeprom(sdi, 0x08, data, 0x8);
239 static int read_eeprom_magic(const struct sr_dev_inst *sdi,
242 return read_eeprom(sdi, 0x10, data, 0x10);
245 static int read_temperature(const struct sr_dev_inst *sdi, int8_t *temp)
247 uint8_t req[2] = {0x00, COMMAND_READ_TEMP};
249 return transact(sdi, req, sizeof(req), (uint8_t*)temp, 1);
252 static int get_firmware_version(const struct sr_dev_inst *sdi)
254 uint8_t req[2] = {0x00, COMMAND_READ_FW_VER};
255 uint8_t rsp[128] = {};
258 ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
261 sr_dbg("fw-version: %s", rsp);
267 static int read_i2c(const struct sr_dev_inst *sdi, uint8_t *data, uint8_t len)
270 uint8_t rsp[1 + 128];
273 if (len < 1 || len > 128 || !data)
277 req[1] = COMMAND_READ_I2C;
278 req[2] = 0xc0; /* Fixed address */
280 req[4] = 0; /* Len MSB? */
282 ret = transact(sdi, req, sizeof(req), rsp, 1 + len);
285 if (rsp[0] != 0x02) {
286 sr_dbg("Failed to do I2C read (0x%02x).", rsp[0]);
290 memcpy(data, rsp + 1, len);
294 static int write_i2c(const struct sr_dev_inst *sdi, const uint8_t *data, uint8_t len)
296 uint8_t req[5 + 128];
300 if (len < 1 || len > 128 || !data)
304 req[1] = COMMAND_WRITE_I2C;
305 req[2] = 0xc0; /* Fixed address */
307 req[4] = 0; /* Len MSB? */
308 memcpy(req + 5, data, len);
310 ret = transact(sdi, req, 5 + len, rsp, sizeof(rsp));
313 if (rsp[0] != 0x02) {
314 sr_dbg("Failed to do I2C write (0x%02x).", rsp[0]);
321 static int wake_i2c(const struct sr_dev_inst *sdi)
323 uint8_t req[] = {0x00, COMMAND_WAKE_I2C};
325 uint8_t i2c_rsp[1 + 1 + 2] = {};
328 ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
331 if (rsp[0] != 0x00) {
332 sr_dbg("Failed to do I2C wake trigger (0x%02x).", rsp[0]);
336 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
340 if (i2c_rsp[1] != 0x11) {
341 sr_dbg("Failed to do I2C wake read (0x%02x).", i2c_rsp[0]);
348 static int crypto_random(const struct sr_dev_inst *sdi, uint8_t *data)
350 uint8_t i2c_req[8] = {0x03, 0x07, 0x1b, 0x00, 0x00, 0x00, 0x24, 0xcd};
351 uint8_t i2c_rsp[1 + 32 + 2] = {};
354 ret = write_i2c(sdi, i2c_req, sizeof(i2c_req));
358 g_usleep(100000); /* TODO: Poll instead. */
360 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
365 memcpy(data, i2c_rsp + 1, 32);
370 static int crypto_nonce(const struct sr_dev_inst *sdi, uint8_t *data)
372 uint8_t i2c_req[6 + 20 + 2] = {0x03, 0x1b, 0x16, 0x00, 0x00, 0x00};
373 uint8_t i2c_rsp[1 + 32 + 2] = {};
380 ret = write_i2c(sdi, i2c_req, sizeof(i2c_req));
384 g_usleep(100000); /* TODO: Poll instead. */
386 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
391 memcpy(data, i2c_rsp + 1, 32);
396 static int crypto_sign(const struct sr_dev_inst *sdi, uint8_t *data, uint8_t *crc)
398 uint8_t i2c_req[8] = {0x03, 0x07, 0x41, 0x80, 0x00, 0x00, 0x28, 0x05};
399 uint8_t i2c_rsp[1 + 64 + 2] = {};
402 ret = write_i2c(sdi, i2c_req, sizeof(i2c_req));
406 g_usleep(100000); /* TODO: Poll instead. */
408 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
412 memcpy(data, i2c_rsp + 1, 64);
413 memcpy(crc, i2c_rsp + 1 + 64, 2);
418 static int authenticate(const struct sr_dev_inst *sdi)
420 struct dev_context *devc = sdi->priv;
421 uint8_t random[32] = {};
422 uint8_t nonce[32] = {};
423 uint8_t sig[64] = {};
424 uint8_t sig_crc[64] = {};
432 ret = crypto_random(sdi, random);
435 sr_dbg("random: 0x%02x 0x%02x 0x%02x 0x%02x", random[0], random[1], random[2], random[3]);
437 ret = crypto_nonce(sdi, nonce);
440 sr_dbg("nonce: 0x%02x 0x%02x 0x%02x 0x%02x", nonce[0], nonce[1], nonce[2], nonce[3]);
442 ret = crypto_nonce(sdi, nonce);
445 sr_dbg("nonce: 0x%02x 0x%02x 0x%02x 0x%02x", nonce[0], nonce[1], nonce[2], nonce[3]);
447 ret = crypto_sign(sdi, sig, sig_crc);
450 sr_dbg("sig: 0x%02x 0x%02x 0x%02x 0x%02x", sig[0], sig[1], sig[2], sig[3]);
451 sr_dbg("sig crc: 0x%02x 0x%02x", sig_crc[0], sig_crc[1]);
454 for (i = 0; i < 28; i++)
455 lfsr ^= nonce[i] << (8 * (i % 4));
456 lfsr ^= sig_crc[0] | sig_crc[1] << 8;
458 sr_dbg("Authenticate 0x%08x -> 0x%08x", devc->lfsr, lfsr);
464 static int upload_bitstream_part(const struct sr_dev_inst *sdi,
465 const uint8_t *data, uint16_t len)
467 uint8_t req[4 + 1020];
471 if (len < 1 || len > 1020 || !data)
475 req[1] = COMMAND_SEND_BITSTREAM;
478 memcpy(req + 4, data, len);
480 ret = transact(sdi, req, 4 + len, rsp, sizeof(rsp));
483 if (rsp[0] != 0x00) {
484 sr_dbg("Failed to do bitstream upload (0x%02x).", rsp[0]);
491 static int upload_bitstream(const struct sr_dev_inst *sdi,
494 struct drv_context *drvc = sdi->driver->context;
495 unsigned char *bitstream = NULL;
500 size_t bs_size, bs_offset = 0, bs_part_size;
502 bitstream = sr_resource_load(drvc->sr_ctx, SR_RESOURCE_FIRMWARE,
503 name, &bs_size, 512 * 1024);
507 sr_info("Uploading bitstream '%s'.", name);
510 req[1] = COMMAND_INIT_BITSTREAM;
512 ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
515 if (rsp[0] != 0x00) {
516 sr_err("Failed to start bitstream upload (0x%02x).", rsp[0]);
521 while (bs_offset < bs_size) {
522 bs_part_size = MIN(bs_size - bs_offset, 1020);
523 sr_spew("Uploading %zd bytes.", bs_part_size);
524 ret = upload_bitstream_part(sdi, bitstream + bs_offset, bs_part_size);
527 bs_offset += bs_part_size;
530 sr_info("Bitstream upload done.");
532 /* Check a scratch register? */
533 ret = write_reg(sdi, 0x7f, 0xaa);
536 ret = read_reg(sdi, 0x7f, ®_val);
539 if (reg_val != 0xaa) {
540 sr_err("Failed FPGA register read-back (0x%02x != 0xaa).", rsp[0]);
552 static int set_led(const struct sr_dev_inst *sdi, uint8_t r, uint8_t g, uint8_t b)
554 uint8_t regs[][2] = {
562 return write_regs(sdi, ARRAY_AND_SIZE(regs));
566 static int configure_channels(const struct sr_dev_inst *sdi)
568 struct dev_context *devc = sdi->priv;
569 const struct sr_channel *c;
573 devc->dig_channel_cnt = 0;
574 devc->dig_channel_mask = 0;
575 for (l = sdi->channels; l; l = l->next) {
580 mask = 1 << c->index;
581 devc->dig_channel_masks[devc->dig_channel_cnt++] = mask;
582 devc->dig_channel_mask |= mask;
585 sr_dbg("%d channels enabled (0x%04x)",
586 devc->dig_channel_cnt, devc->dig_channel_mask);
591 SR_PRIV int saleae_logic_pro_init(const struct sr_dev_inst *sdi)
604 ret = get_firmware_version(sdi);
608 sr_dbg("read serial");
609 ret = read_eeprom_serial(sdi, serial);
613 /* Check if we need to upload the bitstream. */
614 ret = read_reg(sdi, 0x7f, ®_val);
617 if (reg_val == 0xaa) {
618 sr_info("Skipping bitstream upload.");
620 ret = upload_bitstream(sdi, "saleae-logicpro16-fpga.bitstream");
627 ret = write_reg(sdi, 0x00, 0x00);
630 ret = write_reg(sdi, 0x00, 0x80);
635 ret = write_adc(sdi, 0x11, 0x0444);
638 ret = write_adc(sdi, 0x12, 0x0777);
641 ret = write_adc(sdi, 0x25, 0x0000);
644 ret = write_adc(sdi, 0x45, 0x0000);
647 ret = write_adc(sdi, 0x2a, 0x1111);
650 ret = write_adc(sdi, 0x2b, 0x1111);
653 ret = write_adc(sdi, 0x46, 0x0004);
656 ret = write_adc(sdi, 0x50, 0x0000);
659 ret = write_adc(sdi, 0x55, 0x0020);
662 ret = write_adc(sdi, 0x56, 0x0000);
666 ret = write_reg(sdi, 0x15, 0x00);
670 ret = write_adc(sdi, 0x0f, 0x0100);
676 ret = write_reg(sdi, 0x00, 0x02); /* bit 1 */
679 ret = write_reg(sdi, 0x00, 0x00);
682 ret = write_reg(sdi, 0x00, 0x04); /* bit 2 */
685 ret = write_reg(sdi, 0x00, 0x00);
688 ret = write_reg(sdi, 0x00, 0x08); /* bit 3 */
691 ret = write_reg(sdi, 0x00, 0x00);
695 sr_dbg("read dummy");
696 for (i = 0; i < 8; i++) {
697 ret = read_reg(sdi, 0x41 + i, &dummy[i]);
702 /* Read and write back magic EEPROM value. */
703 sr_dbg("read/write magic");
704 ret = read_eeprom_magic(sdi, magic);
707 for (i = 0; i < 16; i++) {
708 ret = write_reg(sdi, 0x17, magic[i]);
713 ret = read_temperature(sdi, &temperature);
716 sr_dbg("temperature = %d", temperature);
718 /* Setting the LED doesn't work yet. */
719 /* set_led(sdi, 0x00, 0x00, 0xff); */
724 SR_PRIV int saleae_logic_pro_prepare(const struct sr_dev_inst *sdi)
726 struct dev_context *devc = sdi->priv;
727 uint8_t regs_unknown[][2] = {
732 uint8_t regs_config[][2] = {
734 {0x08, 0x00}, /* Analog channel mask (LSB) */
735 {0x09, 0x00}, /* Analog channel mask (MSB) */
736 {0x06, 0x01}, /* Digital channel mask (LSB) */
737 {0x07, 0x00}, /* Digital channel mask (MSB) */
738 {0x0a, 0x00}, /* Analog sample rate? */
739 {0x0b, 0x64}, /* Digital sample rate? */
741 {0x0d, 0x00}, /* Analog mux rate? */
742 {0x0e, 0x01}, /* Digital mux rate? */
745 {0x14, 0xff}, /* Pre-divider? */
747 uint8_t start_req[] = {0x00, 0x01};
748 uint8_t start_rsp[2] = {};
750 configure_channels(sdi);
752 /* Digital channel mask and muxing */
753 regs_config[3][1] = devc->dig_channel_mask;
754 regs_config[4][1] = devc->dig_channel_mask >> 8;
755 regs_config[9][1] = devc->dig_channel_cnt;
758 switch (devc->dig_samplerate) {
760 regs_config[6][1] = 0x64;
763 regs_config[6][1] = 0x32;
766 regs_config[6][1] = 0x28;
769 regs_config[6][1] = 0x0a;
772 regs_config[6][1] = 0x04;
773 regs_config[12][1] = 0x80;
776 regs_config[6][1] = 0x02;
777 regs_config[12][1] = 0x40;
785 write_reg(sdi, 0x15, 0x03);
786 write_regs(sdi, ARRAY_AND_SIZE(regs_unknown));
787 write_regs(sdi, ARRAY_AND_SIZE(regs_config));
789 transact(sdi, start_req, sizeof(start_req), start_rsp, sizeof(start_rsp));
794 SR_PRIV int saleae_logic_pro_start(const struct sr_dev_inst *sdi)
796 struct dev_context *devc = sdi->priv;
799 devc->batch_index = 0;
801 write_reg(sdi, 0x00, 0x01);
806 SR_PRIV int saleae_logic_pro_stop(const struct sr_dev_inst *sdi)
808 uint8_t stop_req[] = {0x00, 0x02};
809 uint8_t stop_rsp[2] = {};
813 write_reg(sdi, 0x00, 0x00);
814 transact(sdi, stop_req, sizeof(stop_req), stop_rsp, sizeof(stop_rsp));
816 ret = read_reg(sdi, 0x40, &status);
819 if (status != 0x20) {
820 sr_err("Capture error (status reg = 0x%02x).", status);
827 static void saleae_logic_pro_send_data(const struct sr_dev_inst *sdi,
828 void *data, size_t length, size_t unitsize)
830 const struct sr_datafeed_logic logic = {
832 .unitsize = unitsize,
836 const struct sr_datafeed_packet packet = {
841 sr_session_send(sdi, &packet);
845 * One batch from the device consists of 32 samples per active digital channel.
846 * This stream of batches is packed into USB packets with 16384 bytes each.
848 static void saleae_logic_pro_convert_data(const struct sr_dev_inst *sdi,
849 const uint32_t *src, size_t srccnt)
851 struct dev_context *devc = sdi->priv;
852 uint8_t *dst = devc->conv_buffer;
854 uint16_t channel_mask;
855 unsigned int sample_index, batch_index;
858 /* Copy partial batch to the beginning. */
859 memcpy(dst, dst + devc->conv_size, CONV_BATCH_SIZE);
860 /* Reset converted size. */
863 batch_index = devc->batch_index;
866 dst_batch = (uint16_t*)dst;
868 /* First index of the batch. */
869 if (batch_index == 0)
870 memset(dst, 0, CONV_BATCH_SIZE);
872 /* Convert one channel. */
873 channel_mask = devc->dig_channel_masks[batch_index];
874 for (sample_index = 0; sample_index <= 31; sample_index++)
875 if ((samples >> (31 - sample_index)) & 1)
876 dst_batch[sample_index] |= channel_mask;
878 /* Last index of the batch. */
879 if (++batch_index == devc->dig_channel_cnt) {
880 devc->conv_size += CONV_BATCH_SIZE;
882 dst += CONV_BATCH_SIZE;
885 devc->batch_index = batch_index;
888 SR_PRIV void LIBUSB_CALL saleae_logic_pro_receive_data(struct libusb_transfer *transfer)
890 const struct sr_dev_inst *sdi = transfer->user_data;
891 struct dev_context *devc = sdi->priv;
894 switch (transfer->status) {
895 case LIBUSB_TRANSFER_NO_DEVICE:
896 sr_dbg("FIXME no device");
898 case LIBUSB_TRANSFER_COMPLETED:
899 case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
906 saleae_logic_pro_convert_data(sdi, (uint32_t*)transfer->buffer, 16 * 1024 / 4);
907 saleae_logic_pro_send_data(sdi, devc->conv_buffer, devc->conv_size, 2);
909 if ((ret = libusb_submit_transfer(transfer)) != LIBUSB_SUCCESS)
910 sr_dbg("FIXME resubmit failed");