2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
32 #include <libsigrok/libsigrok.h>
33 #include "libsigrok-internal.h"
38 * This is a unified protocol driver for the DS1000 and DS2000 series.
40 * DS1000 support tested with a Rigol DS1102D.
42 * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
44 * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
45 * standard. If you want to read it - it costs real money...
47 * Every response from the scope has a linefeed appended because the
48 * standard says so. In principle this could be ignored because sending the
49 * next command clears the output queue of the scope. This driver tries to
50 * avoid doing that because it may cause an error being generated inside the
51 * scope and who knows what bugs the firmware has WRT this.
53 * Waveform data is transferred in a format called "arbitrary block program
54 * data" specified in IEEE 488.2. See Agilents programming manuals for their
55 * 2000/3000 series scopes for a nice description.
57 * Each data block from the scope has a header, e.g. "#900000001400".
58 * The '#' marks the start of a block.
59 * Next is one ASCII decimal digit between 1 and 9, this gives the number of
60 * ASCII decimal digits following.
61 * Last are the ASCII decimal digits giving the number of bytes (not
62 * samples!) in the block.
64 * After this header as many data bytes as indicated follow.
66 * Each data block has a trailing linefeed too.
69 static int parse_int(const char *str, int *ret)
75 tmp = strtol(str, &e, 10);
76 if (e == str || *e != '\0') {
77 sr_dbg("Failed to parse integer: '%s'", str);
81 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
84 if (tmp > INT_MAX || tmp < INT_MIN) {
85 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
93 /* Set the next event to wait for in rigol_ds_receive */
94 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
96 if (event == WAIT_STOP)
97 devc->wait_status = 2;
99 devc->wait_status = 1;
100 devc->wait_event = event;
104 * Waiting for a event will return a timeout after 2 to 3 seconds in order
105 * to not block the application.
107 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
110 struct dev_context *devc;
113 if (!(devc = sdi->priv))
119 * Trigger status may return:
120 * "TD" or "T'D" - triggered
121 * "AUTO" - autotriggered
123 * "WAIT" - waiting for trigger
127 if (devc->wait_status == 1) {
129 if (time(NULL) - start >= 3) {
130 sr_dbg("Timeout waiting for trigger");
131 return SR_ERR_TIMEOUT;
134 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
136 } while (buf[0] == status1 || buf[0] == status2);
138 devc->wait_status = 2;
140 if (devc->wait_status == 2) {
142 if (time(NULL) - start >= 3) {
143 sr_dbg("Timeout waiting for trigger");
144 return SR_ERR_TIMEOUT;
147 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
149 } while (buf[0] != status1 && buf[0] != status2);
151 rigol_ds_set_wait_event(devc, WAIT_NONE);
158 * For live capture we need to wait for a new trigger event to ensure that
159 * sample data is not returned twice.
161 * Unfortunately this will never really work because for sufficiently fast
162 * timebases and trigger rates it just can't catch the status changes.
164 * What would be needed is a trigger event register with autoreset like the
165 * Agilents have. The Rigols don't seem to have anything like this.
167 * The workaround is to only wait for the trigger when the timebase is slow
168 * enough. Of course this means that for faster timebases sample data can be
169 * returned multiple times, this effect is mitigated somewhat by sleeping
170 * for about one sweep time in that case.
172 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
174 struct dev_context *devc;
177 if (!(devc = sdi->priv))
181 * If timebase < 50 msecs/DIV just sleep about one sweep time except
182 * for really fast sweeps.
184 if (devc->timebase < 0.0499) {
185 if (devc->timebase > 0.99e-6) {
187 * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
188 * -> 85 percent of sweep time
190 s = (devc->timebase * devc->model->series->num_horizontal_divs
192 sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
195 rigol_ds_set_wait_event(devc, WAIT_NONE);
198 return rigol_ds_event_wait(sdi, 'T', 'A');
202 /* Wait for scope to got to "Stop" in single shot mode */
203 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
205 return rigol_ds_event_wait(sdi, 'S', 'S');
208 /* Check that a single shot acquisition actually succeeded on the DS2000 */
209 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
211 struct dev_context *devc;
212 struct sr_channel *ch;
215 if (!(devc = sdi->priv))
218 ch = devc->channel_entry->data;
220 if (devc->model->series->protocol != PROTOCOL_V3)
223 if (ch->type == SR_CHANNEL_LOGIC) {
224 if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
227 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
228 ch->index + 1) != SR_OK)
231 /* Check that the number of samples will be accepted */
232 if (rigol_ds_config_set(sdi, ":WAV:POIN %d",
233 ch->type == SR_CHANNEL_LOGIC ?
234 devc->digital_frame_size :
235 devc->analog_frame_size) != SR_OK)
237 if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
240 * If we get an "Execution error" the scope went from "Single" to
241 * "Stop" without actually triggering. There is no waveform
242 * displayed and trying to download one will fail - the scope thinks
243 * it has 1400 samples (like display memory) and the driver thinks
244 * it has a different number of samples.
246 * In that case just try to capture something again. Might still
247 * fail in interesting ways.
249 * Ain't firmware fun?
252 sr_warn("Single shot acquisition failed, retrying...");
253 /* Sleep a bit, otherwise the single shot will often fail */
254 g_usleep(500 * 1000);
255 rigol_ds_config_set(sdi, ":SING");
256 rigol_ds_set_wait_event(devc, WAIT_STOP);
263 /* Wait for enough data becoming available in scope output buffer */
264 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
267 struct dev_context *devc;
271 if (!(devc = sdi->priv))
274 if (devc->model->series->protocol == PROTOCOL_V3) {
279 if (time(NULL) - start >= 3) {
280 sr_dbg("Timeout waiting for data block");
281 return SR_ERR_TIMEOUT;
285 * The scope copies data really slowly from sample
286 * memory to its output buffer, so try not to bother
287 * it too much with SCPI requests but don't wait too
288 * long for short sample frame sizes.
290 g_usleep(devc->analog_frame_size < (15 * 1000) ? (100 * 1000) : (1000 * 1000));
292 /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
293 if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
296 if (parse_int(buf + 5, &len) != SR_OK)
298 } while (buf[0] == 'R' && len < (1000 * 1000));
301 rigol_ds_set_wait_event(devc, WAIT_NONE);
306 /* Send a configuration setting. */
307 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
309 struct dev_context *devc = sdi->priv;
313 va_start(args, format);
314 ret = sr_scpi_send_variadic(sdi->conn, format, args);
320 if (devc->model->series->protocol == PROTOCOL_V2) {
321 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
322 sr_spew("delay %dms", 100);
323 g_usleep(100 * 1000);
326 return sr_scpi_get_opc(sdi->conn);
330 /* Start capturing a new frameset */
331 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
333 struct dev_context *devc;
335 unsigned int num_channels, i, j;
338 if (!(devc = sdi->priv))
341 const gboolean first_frame = (devc->num_frames == 0);
343 uint64_t limit_frames = devc->limit_frames;
344 if (devc->num_frames_segmented != 0 && devc->num_frames_segmented < limit_frames)
345 limit_frames = devc->num_frames_segmented;
346 if (limit_frames == 0)
347 sr_dbg("Starting data capture for frameset %" PRIu64,
348 devc->num_frames + 1);
350 sr_dbg("Starting data capture for frameset %" PRIu64 " of %"
351 PRIu64, devc->num_frames + 1, limit_frames);
353 switch (devc->model->series->protocol) {
355 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
358 if (devc->data_source == DATA_SOURCE_LIVE) {
359 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
361 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
363 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
365 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
367 if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
369 if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
371 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
373 rigol_ds_set_wait_event(devc, WAIT_STOP);
379 if (first_frame && rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
381 if (devc->data_source == DATA_SOURCE_LIVE) {
382 if (first_frame && rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
384 devc->analog_frame_size = devc->model->series->live_samples;
385 devc->digital_frame_size = devc->model->series->live_samples;
386 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
388 if (devc->model->series->protocol == PROTOCOL_V3) {
389 if (first_frame && rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
391 } else if (devc->model->series->protocol >= PROTOCOL_V4) {
394 /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
395 for (i = 0; i < devc->model->analog_channels; i++) {
396 if (devc->analog_channels[i]) {
398 } else if (i >= 2 && devc->model->has_digital) {
399 for (j = 0; j < 8; j++) {
400 if (devc->digital_channels[8 * (i - 2) + j]) {
408 buffer_samples = devc->model->series->buffer_samples;
409 if (first_frame && buffer_samples == 0)
411 /* The DS4000 series does not have a fixed memory depth, it
412 * can be chosen from the menu and also varies with number
413 * of active channels. Retrieve the actual number with the
414 * ACQ:MDEP command. */
415 sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples);
416 devc->analog_frame_size = devc->digital_frame_size =
419 else if (first_frame)
421 /* The DS1000Z series has a fixed memory depth which we
422 * need to divide correctly according to the number of
423 * active channels. */
424 devc->analog_frame_size = devc->digital_frame_size =
433 if (devc->data_source == DATA_SOURCE_LIVE && rigol_ds_config_set(sdi, ":SINGL") != SR_OK)
435 rigol_ds_set_wait_event(devc, WAIT_STOP);
436 if (devc->data_source == DATA_SOURCE_SEGMENTED &&
437 devc->model->series->protocol <= PROTOCOL_V4)
438 if (rigol_ds_config_set(sdi, "FUNC:WREP:FCUR %d", devc->num_frames + 1) != SR_OK)
447 /* Start reading data from the current channel */
448 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
450 struct dev_context *devc;
451 struct sr_channel *ch;
453 if (!(devc = sdi->priv))
456 ch = devc->channel_entry->data;
458 sr_dbg("Starting reading data from channel %d", ch->index + 1);
460 const gboolean first_frame = (devc->num_frames == 0);
462 switch (devc->model->series->protocol) {
465 if (ch->type == SR_CHANNEL_LOGIC) {
466 if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
469 if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
470 ch->index + 1) != SR_OK)
473 rigol_ds_set_wait_event(devc, WAIT_NONE);
476 if (ch->type == SR_CHANNEL_LOGIC) {
477 if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
480 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
481 ch->index + 1) != SR_OK)
484 if (devc->data_source != DATA_SOURCE_LIVE) {
485 if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
487 if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
493 if (ch->type == SR_CHANNEL_ANALOG) {
494 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
495 ch->index + 1) != SR_OK)
498 if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d",
503 if (first_frame && rigol_ds_config_set(sdi,
504 devc->data_source == DATA_SOURCE_LIVE ?
505 ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
508 if (devc->data_source != DATA_SOURCE_LIVE) {
509 if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
515 if (devc->model->series->protocol >= PROTOCOL_V3 &&
516 ch->type == SR_CHANNEL_ANALOG) {
517 /* Vertical increment. */
518 if (first_frame && sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
519 &devc->vert_inc[ch->index]) != SR_OK)
521 /* Vertical origin. */
522 if (first_frame && sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
523 &devc->vert_origin[ch->index]) != SR_OK)
525 /* Vertical reference. */
526 if (first_frame && sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
527 &devc->vert_reference[ch->index]) != SR_OK)
529 } else if (ch->type == SR_CHANNEL_ANALOG) {
530 devc->vert_inc[ch->index] = devc->vdiv[ch->index] / 25.6;
533 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
535 devc->num_channel_bytes = 0;
536 devc->num_header_bytes = 0;
537 devc->num_block_bytes = 0;
542 /* Read the header of a data block */
543 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
545 struct sr_scpi_dev_inst *scpi = sdi->conn;
546 struct dev_context *devc = sdi->priv;
547 char *buf = (char *) devc->buffer;
548 size_t header_length;
551 /* Try to read the hashsign and length digit. */
552 if (devc->num_header_bytes < 2) {
553 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
554 2 - devc->num_header_bytes);
556 sr_err("Read error while reading data header.");
559 devc->num_header_bytes += ret;
562 if (devc->num_header_bytes < 2)
565 if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
566 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
570 header_length = 2 + buf[1] - '0';
572 /* Try to read the length. */
573 if (devc->num_header_bytes < header_length) {
574 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
575 header_length - devc->num_header_bytes);
577 sr_err("Read error while reading data header.");
580 devc->num_header_bytes += ret;
583 if (devc->num_header_bytes < header_length)
586 /* Read the data length. */
587 buf[header_length] = '\0';
589 if (parse_int(buf + 2, &ret) != SR_OK) {
590 sr_err("Received invalid data block length '%s'.", buf + 2);
594 sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
599 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
601 struct sr_dev_inst *sdi;
602 struct sr_scpi_dev_inst *scpi;
603 struct dev_context *devc;
604 struct sr_datafeed_packet packet;
605 struct sr_datafeed_analog analog;
606 struct sr_analog_encoding encoding;
607 struct sr_analog_meaning meaning;
608 struct sr_analog_spec spec;
609 struct sr_datafeed_logic logic;
610 double vdiv, offset, origin;
612 struct sr_channel *ch;
613 gsize expected_data_bytes;
617 if (!(sdi = cb_data))
620 if (!(devc = sdi->priv))
625 if (!(revents == G_IO_IN || revents == 0))
628 const gboolean first_frame = (devc->num_frames == 0);
630 switch (devc->wait_event) {
634 if (rigol_ds_trigger_wait(sdi) != SR_OK)
636 if (rigol_ds_channel_start(sdi) != SR_OK)
640 if (rigol_ds_block_wait(sdi) != SR_OK)
644 if (rigol_ds_stop_wait(sdi) != SR_OK)
646 if (rigol_ds_check_stop(sdi) != SR_OK)
648 if (rigol_ds_channel_start(sdi) != SR_OK)
652 sr_err("BUG: Unknown event target encountered");
656 ch = devc->channel_entry->data;
658 expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
659 devc->analog_frame_size : devc->digital_frame_size;
661 if (devc->num_block_bytes == 0) {
662 if (devc->model->series->protocol >= PROTOCOL_V4) {
663 if (first_frame && rigol_ds_config_set(sdi, ":WAV:START %d",
664 devc->num_channel_bytes + 1) != SR_OK)
666 if (first_frame && rigol_ds_config_set(sdi, ":WAV:STOP %d",
667 MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
668 devc->analog_frame_size)) != SR_OK)
672 if (devc->model->series->protocol >= PROTOCOL_V3) {
673 if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
675 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
679 if (sr_scpi_read_begin(scpi) != SR_OK)
682 if (devc->format == FORMAT_IEEE488_2) {
683 sr_dbg("New block header expected");
684 len = rigol_ds_read_header(sdi);
686 /* Still reading the header. */
689 sr_err("Error while reading block header, aborting capture.");
690 std_session_send_df_frame_end(sdi);
691 sr_dev_acquisition_stop(sdi);
694 /* At slow timebases in live capture the DS2072 and
695 * DS1054Z sometimes return "short" data blocks, with
696 * apparently no way to get the rest of the data.
697 * Discard these, the complete data block will appear
700 if (devc->data_source == DATA_SOURCE_LIVE
701 && (unsigned)len < expected_data_bytes) {
702 sr_dbg("Discarding short data block: got %d/%d bytes\n", len, (int)expected_data_bytes);
703 sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
704 devc->num_header_bytes = 0;
707 devc->num_block_bytes = len;
709 devc->num_block_bytes = expected_data_bytes;
711 devc->num_block_read = 0;
714 len = devc->num_block_bytes - devc->num_block_read;
715 if (len > ACQ_BUFFER_SIZE)
716 len = ACQ_BUFFER_SIZE;
717 sr_dbg("Requesting read of %d bytes", len);
719 len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
722 sr_err("Error while reading block data, aborting capture.");
723 std_session_send_df_frame_end(sdi);
724 sr_dev_acquisition_stop(sdi);
728 sr_dbg("Received %d bytes.", len);
730 devc->num_block_read += len;
732 if (ch->type == SR_CHANNEL_ANALOG) {
733 vref = devc->vert_reference[ch->index];
734 vdiv = devc->vert_inc[ch->index];
735 origin = devc->vert_origin[ch->index];
736 offset = devc->vert_offset[ch->index];
737 if (devc->model->series->protocol >= PROTOCOL_V3)
738 for (i = 0; i < len; i++)
739 devc->data[i] = ((int)devc->buffer[i] - vref - origin) * vdiv;
741 for (i = 0; i < len; i++)
742 devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
743 float vdivlog = log10f(vdiv);
744 int digits = -(int)vdivlog + (vdivlog < 0.0);
745 sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
746 analog.meaning->channels = g_slist_append(NULL, ch);
747 analog.num_samples = len;
748 analog.data = devc->data;
749 analog.meaning->mq = SR_MQ_VOLTAGE;
750 analog.meaning->unit = SR_UNIT_VOLT;
751 analog.meaning->mqflags = 0;
752 packet.type = SR_DF_ANALOG;
753 packet.payload = &analog;
754 sr_session_send(sdi, &packet);
755 g_slist_free(analog.meaning->channels);
758 // TODO: For the MSO1000Z series, we need a way to express that
759 // this data is in fact just for a single channel, with the valid
760 // data for that channel in the LSB of each byte.
761 logic.unitsize = devc->model->series->protocol >= PROTOCOL_V4 ? 1 : 2;
762 logic.data = devc->buffer;
763 packet.type = SR_DF_LOGIC;
764 packet.payload = &logic;
765 sr_session_send(sdi, &packet);
768 if (devc->num_block_read == devc->num_block_bytes) {
769 sr_dbg("Block has been completed");
770 if (devc->model->series->protocol >= PROTOCOL_V3) {
771 /* Discard the terminating linefeed */
772 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
774 if (devc->format == FORMAT_IEEE488_2) {
775 /* Prepare for possible next block */
776 devc->num_header_bytes = 0;
777 devc->num_block_bytes = 0;
778 if (devc->data_source != DATA_SOURCE_LIVE)
779 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
781 if (!sr_scpi_read_complete(scpi) && !devc->channel_entry->next) {
782 sr_err("Read should have been completed");
784 devc->num_block_read = 0;
786 sr_dbg("%" PRIu64 " of %" PRIu64 " block bytes read",
787 devc->num_block_read, devc->num_block_bytes);
790 devc->num_channel_bytes += len;
792 if (devc->num_channel_bytes < expected_data_bytes)
793 /* Don't have the full data for this channel yet, re-run. */
796 /* End of data for this channel. */
797 if (devc->model->series->protocol == PROTOCOL_V3) {
798 /* Signal end of data download to scope */
799 if (devc->data_source != DATA_SOURCE_LIVE)
801 * This causes a query error, without it switching
802 * to the next channel causes an error. Fun with
805 rigol_ds_config_set(sdi, ":WAV:END");
808 if (devc->channel_entry->next) {
809 /* We got the frame for this channel, now get the next channel. */
810 devc->channel_entry = devc->channel_entry->next;
811 rigol_ds_channel_start(sdi);
813 /* Done with this frame. */
814 std_session_send_df_frame_end(sdi);
818 /* V5 has no way to read the number of recorded frames, so try to set the
819 * next frame and read it back instead.
821 if (devc->data_source == DATA_SOURCE_SEGMENTED &&
822 devc->model->series->protocol == PROTOCOL_V5) {
824 if (rigol_ds_config_set(sdi, "REC:CURR %d", devc->num_frames + 1) != SR_OK)
826 if (sr_scpi_get_int(sdi->conn, "REC:CURR?", &frames) != SR_OK)
828 devc->num_frames_segmented = frames;
831 if (devc->num_frames == devc->limit_frames ||
832 devc->num_frames == devc->num_frames_segmented ||
833 devc->data_source == DATA_SOURCE_MEMORY) {
834 /* Last frame, stop capture. */
835 sr_dev_acquisition_stop(sdi);
837 /* Get the next frame, starting with the first channel. */
838 devc->channel_entry = devc->enabled_channels;
840 rigol_ds_capture_start(sdi);
842 /* Start of next frame. */
843 std_session_send_df_frame_begin(sdi);
850 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
852 struct dev_context *devc;
853 struct sr_channel *ch;
860 /* Analog channel state. */
861 for (i = 0; i < devc->model->analog_channels; i++) {
862 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
863 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]);
867 ch = g_slist_nth_data(sdi->channels, i);
868 ch->enabled = devc->analog_channels[i];
870 sr_dbg("Current analog channel state:");
871 for (i = 0; i < devc->model->analog_channels; i++)
872 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
874 /* Digital channel state. */
875 if (devc->model->has_digital) {
876 if (sr_scpi_get_bool(sdi->conn,
877 devc->model->series->protocol >= PROTOCOL_V3 ?
878 ":LA:STAT?" : ":LA:DISP?",
879 &devc->la_enabled) != SR_OK)
881 sr_dbg("Logic analyzer %s, current digital channel state:",
882 devc->la_enabled ? "enabled" : "disabled");
883 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
884 if (devc->model->series->protocol >= PROTOCOL_V5)
885 cmd = g_strdup_printf(":LA:DISP? D%d", i);
886 else if (devc->model->series->protocol >= PROTOCOL_V3)
887 cmd = g_strdup_printf(":LA:DIG%d:DISP?", i);
889 cmd = g_strdup_printf(":DIG%d:TURN?", i);
890 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
894 ch = g_slist_nth_data(sdi->channels, i + devc->model->analog_channels);
895 ch->enabled = devc->digital_channels[i];
896 sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
901 if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
903 sr_dbg("Current timebase %g", devc->timebase);
905 /* Probe attenuation. */
906 for (i = 0; i < devc->model->analog_channels; i++) {
907 cmd = g_strdup_printf(":CHAN%d:PROB?", i + 1);
909 /* DSO1000B series prints an X after the probe factor, so
910 * we get a string and check for that instead of only handling
913 res = sr_scpi_get_string(sdi->conn, cmd, &response);
917 int len = strlen(response);
918 if (response[len-1] == 'X')
921 res = sr_atof_ascii(response, &devc->attenuation[i]);
927 sr_dbg("Current probe attenuation:");
928 for (i = 0; i < devc->model->analog_channels; i++)
929 sr_dbg("CH%d %g", i + 1, devc->attenuation[i]);
931 /* Vertical gain and offset. */
932 if (rigol_ds_get_dev_cfg_vertical(sdi) != SR_OK)
936 for (i = 0; i < devc->model->analog_channels; i++) {
937 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
938 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
943 sr_dbg("Current coupling:");
944 for (i = 0; i < devc->model->analog_channels; i++)
945 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
947 /* Trigger source. */
948 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
950 sr_dbg("Current trigger source %s", devc->trigger_source);
952 /* Horizontal trigger position. */
953 if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str,
954 &devc->horiz_triggerpos) != SR_OK)
956 sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
959 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
961 sr_dbg("Current trigger slope %s", devc->trigger_slope);
964 if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK)
966 sr_dbg("Current trigger level %g", devc->trigger_level);
971 SR_PRIV int rigol_ds_get_dev_cfg_vertical(const struct sr_dev_inst *sdi)
973 struct dev_context *devc;
981 for (i = 0; i < devc->model->analog_channels; i++) {
982 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
983 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
988 sr_dbg("Current vertical gain:");
989 for (i = 0; i < devc->model->analog_channels; i++)
990 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
992 /* Vertical offset. */
993 for (i = 0; i < devc->model->analog_channels; i++) {
994 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
995 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
1000 sr_dbg("Current vertical offset:");
1001 for (i = 0; i < devc->model->analog_channels; i++)
1002 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);