2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
28 #include "libsigrok.h"
29 #include "libsigrok-internal.h"
32 static const int32_t hwopts[] = {
37 static const int32_t hwcaps[] = {
40 SR_CONF_TRIGGER_SOURCE,
41 SR_CONF_TRIGGER_SLOPE,
42 SR_CONF_HORIZ_TRIGGERPOS,
48 static const int32_t analog_hwcaps[] = {
55 static const uint64_t timebases[][2] = {
98 static const uint64_t vdivs[][2] = {
118 #define NUM_TIMEBASE ARRAY_SIZE(timebases)
119 #define NUM_VDIV ARRAY_SIZE(vdivs)
121 static const char *trigger_sources[] = {
146 static const char *trigger_slopes[] = {
151 static const char *coupling[] = {
157 /* Do not change the order of entries */
158 static const char *data_sources[] = {
177 /* short name, full name */
178 static const struct rigol_ds_vendor supported_vendors[] = {
179 [RIGOL] = {"Rigol", "Rigol Technologies"},
180 [AGILENT] = {"Agilent", "Agilent Technologies"},
183 #define VENDOR(x) &supported_vendors[x]
184 /* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
185 * live waveform samples, memory buffer samples */
186 static const struct rigol_ds_series supported_series[] = {
187 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
188 {50, 1}, {2, 1000}, 14, 2048, 0},
189 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
190 {50, 1}, {2, 1000}, 12, 600, 1048576},
191 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
192 {500, 1}, {2, 1000}, 14, 1400, 14000},
193 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
194 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
195 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
196 {50, 1}, {2, 1000}, 12, 600, 20480},
199 #define SERIES(x) &supported_series[x]
200 /* series, model, min timebase, analog channels, digital */
201 static const struct rigol_ds_model supported_models[] = {
202 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
203 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
204 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
205 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
208 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
209 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
210 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
212 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
213 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
214 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
215 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
216 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
217 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
218 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
219 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
220 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
221 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
222 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
223 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
224 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
226 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
227 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
228 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
230 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
231 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
234 SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
235 static struct sr_dev_driver *di = &rigol_ds_driver_info;
237 static void clear_helper(void *priv)
239 struct dev_context *devc;
243 g_free(devc->buffer);
244 g_free(devc->coupling[0]);
245 g_free(devc->coupling[1]);
246 g_free(devc->trigger_source);
247 g_free(devc->trigger_slope);
248 g_free(devc->analog_groups);
249 g_free(devc->digital_group);
253 static int dev_clear(void)
255 return std_dev_clear(di, clear_helper);
258 static int init(struct sr_context *sr_ctx)
260 return std_init(sr_ctx, di, LOG_PREFIX);
263 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
265 struct dev_context *devc;
266 struct sr_dev_inst *sdi;
267 struct sr_scpi_hw_info *hw_info;
268 struct sr_channel *ch;
271 const struct rigol_ds_model *model = NULL;
272 gchar *channel_name, **version;
274 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
275 sr_info("Couldn't get IDN response, retrying.");
278 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
279 sr_info("Couldn't get IDN response.");
284 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
285 if (!strcasecmp(hw_info->manufacturer,
286 supported_models[i].series->vendor->full_name) &&
287 !strcmp(hw_info->model, supported_models[i].name)) {
288 model = &supported_models[i];
293 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
294 model->series->vendor->name,
296 hw_info->firmware_version))) {
297 sr_scpi_hw_info_free(hw_info);
304 sdi->inst_type = SR_INST_SCPI;
306 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
309 devc->limit_frames = 0;
311 devc->format = model->series->format;
313 /* DS1000 models with firmware before 0.2.4 used the old data format. */
314 if (model->series == SERIES(DS1000)) {
315 version = g_strsplit(hw_info->firmware_version, ".", 0);
317 if (!version[0] || !version[1] || !version[2])
319 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
321 for (i = 0; i < 3; i++) {
322 if (sr_atol(version[i], &n[i]) != SR_OK)
327 if (n[0] != 0 || n[1] > 2)
329 if (n[1] == 2 && n[2] > 3)
331 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
332 devc->format = FORMAT_RAW;
337 sr_scpi_hw_info_free(hw_info);
339 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
340 model->analog_channels);
342 for (i = 0; i < model->analog_channels; i++) {
343 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
345 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_name);
346 sdi->channels = g_slist_append(sdi->channels, ch);
348 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
350 devc->analog_groups[i]->name = channel_name;
351 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
352 sdi->channel_groups = g_slist_append(sdi->channel_groups,
353 devc->analog_groups[i]);
356 if (devc->model->has_digital) {
357 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group*));
359 for (i = 0; i < 16; i++) {
360 if (!(channel_name = g_strdup_printf("D%d", i)))
362 ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE, channel_name);
363 g_free(channel_name);
366 sdi->channels = g_slist_append(sdi->channels, ch);
367 devc->digital_group->channels = g_slist_append(
368 devc->digital_group->channels, ch);
370 devc->digital_group->name = g_strdup("LA");
371 sdi->channel_groups = g_slist_append(sdi->channel_groups,
372 devc->digital_group);
375 for (i = 0; i < NUM_TIMEBASE; i++) {
376 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
377 devc->timebases = &timebases[i];
378 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
379 devc->num_timebases = &timebases[i] - devc->timebases + 1;
382 for (i = 0; i < NUM_VDIV; i++)
383 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
384 devc->vdivs = &vdivs[i];
386 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
388 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
391 devc->data_source = DATA_SOURCE_LIVE;
398 static GSList *scan(GSList *options)
400 return sr_scpi_scan(di->priv, options, probe_device);
403 static GSList *dev_list(void)
405 return ((struct drv_context *)(di->priv))->instances;
408 static int dev_open(struct sr_dev_inst *sdi)
410 struct sr_scpi_dev_inst *scpi = sdi->conn;
412 if (sr_scpi_open(scpi) < 0)
415 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
418 sdi->status = SR_ST_ACTIVE;
423 static int dev_close(struct sr_dev_inst *sdi)
425 struct sr_scpi_dev_inst *scpi;
426 struct dev_context *devc;
428 if (sdi->status != SR_ST_ACTIVE)
429 return SR_ERR_DEV_CLOSED;
434 if (devc->model->series->protocol == PROTOCOL_V2)
435 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
438 if (sr_scpi_close(scpi) < 0)
440 sdi->status = SR_ST_INACTIVE;
446 static int cleanup(void)
451 static int analog_frame_size(const struct sr_dev_inst *sdi)
453 struct dev_context *devc = sdi->priv;
454 struct sr_channel *ch;
455 int analog_channels = 0;
458 for (l = sdi->channels; l; l = l->next) {
460 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
464 if (analog_channels == 0)
467 switch (devc->data_source) {
468 case DATA_SOURCE_LIVE:
469 return devc->model->series->live_samples;
470 case DATA_SOURCE_MEMORY:
471 return devc->model->series->buffer_samples / analog_channels;
477 static int digital_frame_size(const struct sr_dev_inst *sdi)
479 struct dev_context *devc = sdi->priv;
481 switch (devc->data_source) {
482 case DATA_SOURCE_LIVE:
483 return devc->model->series->live_samples * 2;
484 case DATA_SOURCE_MEMORY:
485 return devc->model->series->buffer_samples * 2;
491 static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
492 const struct sr_channel_group *cg)
494 struct dev_context *devc;
495 struct sr_channel *ch;
498 int analog_channel = -1;
499 float smallest_diff = 0.0000000001;
503 if (!sdi || !(devc = sdi->priv))
506 /* If a channel group is specified, it must be a valid one. */
507 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
508 sr_err("Invalid channel group specified.");
513 ch = g_slist_nth_data(cg->channels, 0);
516 if (ch->type == SR_CHANNEL_ANALOG) {
517 if (ch->name[2] < '1' || ch->name[2] > '4')
519 analog_channel = ch->name[2] - '1';
524 case SR_CONF_NUM_TIMEBASE:
525 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
527 case SR_CONF_NUM_VDIV:
528 *data = g_variant_new_int32(NUM_VDIV);
529 case SR_CONF_DATA_SOURCE:
530 if (devc->data_source == DATA_SOURCE_LIVE)
531 *data = g_variant_new_string("Live");
532 else if (devc->data_source == DATA_SOURCE_MEMORY)
533 *data = g_variant_new_string("Memory");
535 *data = g_variant_new_string("Segmented");
537 case SR_CONF_SAMPLERATE:
538 if (devc->data_source == DATA_SOURCE_LIVE) {
539 samplerate = analog_frame_size(sdi) /
540 (devc->timebase * devc->model->series->num_horizontal_divs);
541 *data = g_variant_new_uint64(samplerate);
546 case SR_CONF_TRIGGER_SOURCE:
547 if (!strcmp(devc->trigger_source, "ACL"))
549 else if (!strcmp(devc->trigger_source, "CHAN1"))
551 else if (!strcmp(devc->trigger_source, "CHAN2"))
553 else if (!strcmp(devc->trigger_source, "CHAN3"))
555 else if (!strcmp(devc->trigger_source, "CHAN4"))
558 tmp_str = devc->trigger_source;
559 *data = g_variant_new_string(tmp_str);
561 case SR_CONF_TRIGGER_SLOPE:
562 if (!strcmp(devc->trigger_slope, "POS"))
564 else if (!strcmp(devc->trigger_slope, "NEG"))
568 *data = g_variant_new_string(tmp_str);
570 case SR_CONF_TIMEBASE:
571 for (i = 0; i < devc->num_timebases; i++) {
572 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
573 float diff = fabs(devc->timebase - tb);
574 if (diff < smallest_diff) {
575 smallest_diff = diff;
581 *data = g_variant_new("(tt)", devc->timebases[idx][0],
582 devc->timebases[idx][1]);
585 if (analog_channel < 0)
587 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
588 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
589 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
590 if (diff < smallest_diff) {
591 smallest_diff = diff;
597 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
599 case SR_CONF_COUPLING:
600 if (analog_channel < 0)
602 *data = g_variant_new_string(devc->coupling[analog_channel]);
611 static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
612 const struct sr_channel_group *cg)
614 struct dev_context *devc;
622 if (!(devc = sdi->priv))
625 if (sdi->status != SR_ST_ACTIVE)
626 return SR_ERR_DEV_CLOSED;
628 /* If a channel group is specified, it must be a valid one. */
629 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
630 sr_err("Invalid channel group specified.");
636 case SR_CONF_LIMIT_FRAMES:
637 devc->limit_frames = g_variant_get_uint64(data);
639 case SR_CONF_TRIGGER_SLOPE:
640 tmp_str = g_variant_get_string(data, NULL);
642 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
645 g_free(devc->trigger_slope);
646 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
647 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
649 case SR_CONF_HORIZ_TRIGGERPOS:
650 t_dbl = g_variant_get_double(data);
651 if (t_dbl < 0.0 || t_dbl > 1.0)
653 devc->horiz_triggerpos = t_dbl;
654 /* We have the trigger offset as a percentage of the frame, but
655 * need to express this in seconds. */
656 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
657 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
658 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
660 case SR_CONF_TIMEBASE:
661 g_variant_get(data, "(tt)", &p, &q);
662 for (i = 0; i < devc->num_timebases; i++) {
663 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
664 devc->timebase = (float)p / q;
665 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
667 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
671 if (i == devc->num_timebases)
674 case SR_CONF_TRIGGER_SOURCE:
675 tmp_str = g_variant_get_string(data, NULL);
676 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
677 if (!strcmp(trigger_sources[i], tmp_str)) {
678 g_free(devc->trigger_source);
679 devc->trigger_source = g_strdup(trigger_sources[i]);
680 if (!strcmp(devc->trigger_source, "AC Line"))
682 else if (!strcmp(devc->trigger_source, "CH1"))
684 else if (!strcmp(devc->trigger_source, "CH2"))
686 else if (!strcmp(devc->trigger_source, "CH3"))
688 else if (!strcmp(devc->trigger_source, "CH4"))
691 tmp_str = (char *)devc->trigger_source;
692 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
696 if (i == ARRAY_SIZE(trigger_sources))
701 sr_err("No channel group specified.");
702 return SR_ERR_CHANNEL_GROUP;
704 g_variant_get(data, "(tt)", &p, &q);
705 for (i = 0; i < 2; i++) {
706 if (cg == devc->analog_groups[i]) {
707 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
708 if (vdivs[j][0] != p || vdivs[j][1] != q)
710 devc->vdiv[i] = (float)p / q;
711 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
713 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
720 case SR_CONF_COUPLING:
722 sr_err("No channel group specified.");
723 return SR_ERR_CHANNEL_GROUP;
725 tmp_str = g_variant_get_string(data, NULL);
726 for (i = 0; i < 2; i++) {
727 if (cg == devc->analog_groups[i]) {
728 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
729 if (!strcmp(tmp_str, coupling[j])) {
730 g_free(devc->coupling[i]);
731 devc->coupling[i] = g_strdup(coupling[j]);
732 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
740 case SR_CONF_DATA_SOURCE:
741 tmp_str = g_variant_get_string(data, NULL);
742 if (!strcmp(tmp_str, "Live"))
743 devc->data_source = DATA_SOURCE_LIVE;
744 else if (devc->model->series->protocol >= PROTOCOL_V2
745 && !strcmp(tmp_str, "Memory"))
746 devc->data_source = DATA_SOURCE_MEMORY;
747 else if (devc->model->series->protocol >= PROTOCOL_V3
748 && !strcmp(tmp_str, "Segmented"))
749 devc->data_source = DATA_SOURCE_SEGMENTED;
761 static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
762 const struct sr_channel_group *cg)
764 GVariant *tuple, *rational[2];
767 struct dev_context *devc = NULL;
772 if (key == SR_CONF_SCAN_OPTIONS) {
773 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
774 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
776 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
777 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
778 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
782 /* Every other option requires a valid device instance. */
783 if (!sdi || !(devc = sdi->priv))
786 /* If a channel group is specified, it must be a valid one. */
788 if (cg != devc->analog_groups[0]
789 && cg != devc->analog_groups[1]) {
790 sr_err("Invalid channel group specified.");
796 case SR_CONF_DEVICE_OPTIONS:
798 sr_err("No channel group specified.");
799 return SR_ERR_CHANNEL_GROUP;
801 if (cg == devc->digital_group) {
802 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
803 NULL, 0, sizeof(int32_t));
806 for (i = 0; i < 2; i++) {
807 if (cg == devc->analog_groups[i]) {
808 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
809 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
816 case SR_CONF_COUPLING:
818 sr_err("No channel group specified.");
819 return SR_ERR_CHANNEL_GROUP;
821 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
825 /* Can't know this until we have the exact model. */
828 sr_err("No channel group specified.");
829 return SR_ERR_CHANNEL_GROUP;
831 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
832 for (i = 0; i < NUM_VDIV; i++) {
833 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
834 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
835 tuple = g_variant_new_tuple(rational, 2);
836 g_variant_builder_add_value(&gvb, tuple);
838 *data = g_variant_builder_end(&gvb);
840 case SR_CONF_TIMEBASE:
842 /* Can't know this until we have the exact model. */
844 if (devc->num_timebases <= 0)
846 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
847 for (i = 0; i < devc->num_timebases; i++) {
848 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
849 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
850 tuple = g_variant_new_tuple(rational, 2);
851 g_variant_builder_add_value(&gvb, tuple);
853 *data = g_variant_builder_end(&gvb);
855 case SR_CONF_TRIGGER_SOURCE:
857 /* Can't know this until we have the exact model. */
859 *data = g_variant_new_strv(trigger_sources,
860 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
862 case SR_CONF_TRIGGER_SLOPE:
863 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
865 case SR_CONF_DATA_SOURCE:
867 /* Can't know this until we have the exact model. */
869 switch (devc->model->series->protocol) {
871 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
874 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
877 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
888 static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
890 struct sr_scpi_dev_inst *scpi;
891 struct dev_context *devc;
892 struct sr_channel *ch;
893 struct sr_datafeed_packet packet;
896 if (sdi->status != SR_ST_ACTIVE)
897 return SR_ERR_DEV_CLOSED;
902 devc->num_frames = 0;
904 for (l = sdi->channels; l; l = l->next) {
906 sr_dbg("handling channel %s", ch->name);
907 if (ch->type == SR_CHANNEL_ANALOG) {
909 devc->enabled_analog_channels = g_slist_append(
910 devc->enabled_analog_channels, ch);
911 if (ch->enabled != devc->analog_channels[ch->index]) {
912 /* Enabled channel is currently disabled, or vice versa. */
913 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
914 ch->enabled ? "ON" : "OFF") != SR_OK)
916 devc->analog_channels[ch->index] = ch->enabled;
918 } else if (ch->type == SR_CHANNEL_LOGIC) {
920 devc->enabled_digital_channels = g_slist_append(
921 devc->enabled_digital_channels, ch);
922 /* Turn on LA module if currently off. */
923 if (!devc->la_enabled) {
924 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
926 devc->la_enabled = TRUE;
929 if (ch->enabled != devc->digital_channels[ch->index]) {
930 /* Enabled channel is currently disabled, or vice versa. */
931 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
932 ch->enabled ? "ON" : "OFF") != SR_OK)
934 devc->digital_channels[ch->index] = ch->enabled;
939 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
942 /* Turn off LA module if on and no digital channels selected. */
943 if (devc->la_enabled && !devc->enabled_digital_channels)
944 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
947 /* Set memory mode. */
948 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
949 sr_err("Data source 'Segmented' not yet supported");
953 devc->analog_frame_size = analog_frame_size(sdi);
954 devc->digital_frame_size = digital_frame_size(sdi);
956 switch (devc->model->series->protocol) {
958 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
962 /* Apparently for the DS2000 the memory
963 * depth can only be set in Running state -
964 * this matches the behaviour of the UI. */
965 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
967 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
968 devc->analog_frame_size) != SR_OK)
970 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
977 if (devc->data_source == DATA_SOURCE_LIVE)
978 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
981 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
982 rigol_ds_receive, (void *)sdi);
984 /* Send header packet to the session bus. */
985 std_session_send_df_header(cb_data, LOG_PREFIX);
987 if (devc->enabled_analog_channels)
988 devc->channel_entry = devc->enabled_analog_channels;
990 devc->channel_entry = devc->enabled_digital_channels;
992 if (rigol_ds_capture_start(sdi) != SR_OK)
995 /* Start of first frame. */
996 packet.type = SR_DF_FRAME_BEGIN;
997 sr_session_send(cb_data, &packet);
1002 static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1004 struct dev_context *devc;
1005 struct sr_scpi_dev_inst *scpi;
1006 struct sr_datafeed_packet packet;
1012 if (sdi->status != SR_ST_ACTIVE) {
1013 sr_err("Device inactive, can't stop acquisition.");
1017 /* End of last frame. */
1018 packet.type = SR_DF_END;
1019 sr_session_send(sdi, &packet);
1021 g_slist_free(devc->enabled_analog_channels);
1022 g_slist_free(devc->enabled_digital_channels);
1023 devc->enabled_analog_channels = NULL;
1024 devc->enabled_digital_channels = NULL;
1026 sr_scpi_source_remove(sdi->session, scpi);
1031 SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1033 .longname = "Rigol DS",
1038 .dev_list = dev_list,
1039 .dev_clear = dev_clear,
1040 .config_get = config_get,
1041 .config_set = config_set,
1042 .config_list = config_list,
1043 .dev_open = dev_open,
1044 .dev_close = dev_close,
1045 .dev_acquisition_start = dev_acquisition_start,
1046 .dev_acquisition_stop = dev_acquisition_stop,