2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 static const uint32_t devopts[] = {
24 SR_CONF_LOGIC_ANALYZER,
25 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
27 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
28 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
29 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
31 SR_CONF_SWAP | SR_CONF_SET,
32 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
35 static const int32_t trigger_matches[] = {
42 #define STR_PATTERN_NONE "None"
43 #define STR_PATTERN_EXTERNAL "External"
44 #define STR_PATTERN_INTERNAL "Internal"
46 /* Supported methods of test pattern outputs */
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
54 /** Route test pattern internally to capture buffer. */
58 static const char *patterns[] = {
64 /* Channels are numbered 0-31 (on the PCB silkscreen). */
65 SR_PRIV const char *p_ols_channel_names[] = {
66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
71 /* Default supported samplerates, can be overridden by device metadata. */
72 static const uint64_t samplerates[] = {
78 static GSList *scan(struct sr_dev_driver *di, GSList *options)
80 struct sr_dev_inst *sdi;
81 struct drv_context *drvc;
82 struct dev_context *devc;
94 /* Allocate memory for our private device context. */
95 devc = g_malloc0(sizeof(struct dev_context));
97 /* Device-specific settings */
98 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
100 /* Acquisition settings */
101 devc->limit_samples = devc->capture_ratio = 0;
102 devc->trigger_at = -1;
103 devc->channel_mask = 0xffffffff;
106 /* Allocate memory for the incoming ftdi data. */
107 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
109 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
110 if (!(devc->ftdic = ftdi_new())) {
111 sr_err("Failed to initialize libftdi.");
112 goto err_free_ftdi_buf;;
115 /* Try to open the FTDI device */
116 if (p_ols_open(devc) != SR_OK) {
120 /* The discovery procedure is like this: first send the Reset
121 * command (0x00) 5 times, since the device could be anywhere
122 * in a 5-byte command. Then send the ID command (0x02).
123 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
128 for (i = 0; i < 5; i++) {
129 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
134 sr_err("Could not reset device. Quitting.");
135 goto err_close_ftdic;
137 write_shortcommand(devc, CMD_ID);
139 /* Read the response data. */
140 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
141 if (bytes_read < 0) {
142 sr_err("Failed to read FTDI data (%d): %s.",
143 bytes_read, ftdi_get_error_string(devc->ftdic));
144 goto err_close_ftdic;
146 if (bytes_read == 0) {
147 goto err_close_ftdic;
150 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
151 goto err_close_ftdic;
153 /* Definitely using the OLS protocol, check if it supports
154 * the metadata command.
156 write_shortcommand(devc, CMD_METADATA);
158 /* Read the metadata. */
159 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
160 if (bytes_read < 0) {
161 sr_err("Failed to read FTDI data (%d): %s.",
162 bytes_read, ftdi_get_error_string(devc->ftdic));
163 goto err_close_ftdic;
165 if (bytes_read == 0) {
166 goto err_close_ftdic;
169 /* Close device. We'll reopen it again when we need it. */
172 /* Parse the metadata. */
173 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
175 /* Configure samplerate and divider. */
176 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
177 sr_dbg("Failed to set default samplerate (%"PRIu64").",
180 drvc->instances = g_slist_append(drvc->instances, sdi);
181 devices = g_slist_append(devices, sdi);
188 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
190 g_free(devc->ftdi_buf);
196 static void clear_helper(void *priv)
198 struct dev_context *devc;
202 ftdi_free(devc->ftdic);
203 g_free(devc->ftdi_buf);
206 static int dev_clear(const struct sr_dev_driver *di)
208 return std_dev_clear(di, clear_helper);
211 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
212 const struct sr_channel_group *cg)
214 struct dev_context *devc;
223 case SR_CONF_SAMPLERATE:
224 *data = g_variant_new_uint64(devc->cur_samplerate);
226 case SR_CONF_CAPTURE_RATIO:
227 *data = g_variant_new_uint64(devc->capture_ratio);
229 case SR_CONF_LIMIT_SAMPLES:
230 *data = g_variant_new_uint64(devc->limit_samples);
232 case SR_CONF_PATTERN_MODE:
233 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
234 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
235 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
236 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
238 *data = g_variant_new_string(STR_PATTERN_NONE);
241 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
243 case SR_CONF_EXTERNAL_CLOCK:
244 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
253 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
254 const struct sr_channel_group *cg)
256 struct dev_context *devc;
264 if (sdi->status != SR_ST_ACTIVE)
265 return SR_ERR_DEV_CLOSED;
270 case SR_CONF_SAMPLERATE:
271 tmp_u64 = g_variant_get_uint64(data);
272 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
273 return SR_ERR_SAMPLERATE;
274 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
276 case SR_CONF_LIMIT_SAMPLES:
277 tmp_u64 = g_variant_get_uint64(data);
278 if (tmp_u64 < MIN_NUM_SAMPLES)
280 devc->limit_samples = tmp_u64;
283 case SR_CONF_CAPTURE_RATIO:
284 devc->capture_ratio = g_variant_get_uint64(data);
285 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
290 case SR_CONF_EXTERNAL_CLOCK:
291 if (g_variant_get_boolean(data)) {
292 sr_info("Enabling external clock.");
293 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
295 sr_info("Disabled external clock.");
296 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
300 case SR_CONF_PATTERN_MODE:
301 stropt = g_variant_get_string(data, NULL);
304 if (!strcmp(stropt, STR_PATTERN_NONE)) {
305 sr_info("Disabling test modes.");
307 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
308 sr_info("Enabling internal test mode.");
309 flag = FLAG_INTERNAL_TEST_MODE;
310 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
311 sr_info("Enabling external test mode.");
312 flag = FLAG_EXTERNAL_TEST_MODE;
316 if (flag != 0xffff) {
317 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
318 devc->flag_reg |= flag;
322 if (g_variant_get_boolean(data)) {
323 sr_info("Enabling channel swapping.");
324 devc->flag_reg |= FLAG_SWAP_CHANNELS;
326 sr_info("Disabling channel swapping.");
327 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
333 if (g_variant_get_boolean(data)) {
334 sr_info("Enabling RLE.");
335 devc->flag_reg |= FLAG_RLE;
337 sr_info("Disabling RLE.");
338 devc->flag_reg &= ~FLAG_RLE;
349 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
350 const struct sr_channel_group *cg)
352 struct dev_context *devc;
353 GVariant *gvar, *grange[2];
355 int num_pols_changrp, i;
360 case SR_CONF_DEVICE_OPTIONS:
361 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
362 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
364 case SR_CONF_SAMPLERATE:
365 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
366 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
367 ARRAY_SIZE(samplerates), sizeof(uint64_t));
368 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
369 *data = g_variant_builder_end(&gvb);
371 case SR_CONF_TRIGGER_MATCH:
372 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
373 trigger_matches, ARRAY_SIZE(trigger_matches),
376 case SR_CONF_PATTERN_MODE:
377 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
379 case SR_CONF_LIMIT_SAMPLES:
383 if (devc->flag_reg & FLAG_RLE)
385 if (devc->max_samplebytes == 0)
386 /* Device didn't specify sample memory size in metadata. */
389 * Channel groups are turned off if no channels in that group are
390 * enabled, making more room for samples for the enabled group.
392 pols_channel_mask(sdi);
393 num_pols_changrp = 0;
394 for (i = 0; i < 4; i++) {
395 if (devc->channel_mask & (0xff << (i * 8)))
398 /* 3 channel groups takes as many bytes as 4 channel groups */
399 if (num_pols_changrp == 3)
400 num_pols_changrp = 4;
401 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
402 if (num_pols_changrp)
403 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
405 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
406 *data = g_variant_new_tuple(grange, 2);
415 static int dev_open(struct sr_dev_inst *sdi)
417 struct dev_context *devc;
421 if (p_ols_open(devc) != SR_OK) {
424 sdi->status = SR_ST_ACTIVE;
429 static int dev_close(struct sr_dev_inst *sdi)
432 struct dev_context *devc;
437 if (sdi->status == SR_ST_ACTIVE) {
438 sr_dbg("Status ACTIVE, closing device.");
439 ret = p_ols_close(devc);
441 sr_spew("Status not ACTIVE, nothing to do.");
444 sdi->status = SR_ST_INACTIVE;
449 static int set_trigger(const struct sr_dev_inst *sdi, int stage)
451 struct dev_context *devc;
456 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
457 arg[0] = devc->trigger_mask[stage] & 0xff;
458 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
459 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
460 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
461 if (write_longcommand(devc, cmd, arg) != SR_OK)
464 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
465 arg[0] = devc->trigger_value[stage] & 0xff;
466 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
467 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
468 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
469 if (write_longcommand(devc, cmd, arg) != SR_OK)
472 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
473 arg[0] = arg[1] = arg[3] = 0x00;
475 if (stage == devc->num_stages)
476 /* Last stage, fire when this one matches. */
477 arg[3] |= TRIGGER_START;
478 if (write_longcommand(devc, cmd, arg) != SR_OK)
481 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
482 arg[0] = devc->trigger_edge[stage] & 0xff;
483 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
484 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
485 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
486 if (write_longcommand(devc, cmd, arg) != SR_OK)
492 static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
494 struct dev_context *devc;
499 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
500 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
501 if (write_longcommand(devc, cmd, arg) != SR_OK)
504 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
505 if (write_longcommand(devc, cmd, arg) != SR_OK)
508 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
510 if (write_longcommand(devc, cmd, arg) != SR_OK)
513 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
515 if (write_longcommand(devc, cmd, arg) != SR_OK)
521 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
523 struct dev_context *devc;
524 uint32_t samplecount, readcount, delaycount;
525 uint8_t pols_changrp_mask, arg[4];
527 int num_pols_changrp, samplespercount;
530 if (sdi->status != SR_ST_ACTIVE)
531 return SR_ERR_DEV_CLOSED;
535 pols_channel_mask(sdi);
538 * Enable/disable channel groups in the flag register according to the
539 * channel mask. Calculate this here, because num_pols_changrp is
540 * needed to limit readcount.
542 pols_changrp_mask = 0;
543 num_pols_changrp = 0;
544 for (i = 0; i < 4; i++) {
545 if (devc->channel_mask & (0xff << (i * 8))) {
546 pols_changrp_mask |= (1 << i);
550 /* 3 channel groups takes as many bytes as 4 channel groups */
551 if (num_pols_changrp == 3)
552 num_pols_changrp = 4;
553 /* maximum number of samples (or RLE counts) the buffer memory can hold */
554 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
557 * Limit readcount to prevent reading past the end of the hardware
560 sr_dbg("max_samples = %d", devc->max_samples);
561 sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
562 samplecount = MIN(devc->max_samples, devc->limit_samples);
563 sr_dbg("Samplecount = %d", samplecount);
565 /* In demux mode the OLS is processing two samples per clock */
566 if (devc->flag_reg & FLAG_DEMUX) {
573 readcount = samplecount / samplespercount;
575 /* Rather read too many samples than too few. */
576 if (samplecount % samplespercount != 0)
579 /* Basic triggers. */
580 if (pols_convert_trigger(sdi) != SR_OK) {
581 sr_err("Failed to configure channels.");
585 if (devc->num_stages > 0) {
586 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
587 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
588 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
589 if (i <= devc->num_stages) {
590 sr_dbg("Setting p-ols stage %d trigger.", i);
591 if ((ret = set_trigger(sdi, i)) != SR_OK)
595 sr_dbg("Disabling p-ols stage %d trigger.", i);
596 if ((ret = disable_trigger(sdi, i)) != SR_OK)
601 /* No triggers configured, force trigger on first stage. */
602 sr_dbg("Forcing trigger at stage 0.");
603 if ((ret = set_trigger(sdi, 0)) != SR_OK)
605 delaycount = readcount;
609 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
610 devc->cur_samplerate, devc->cur_samplerate_divider);
611 arg[0] = devc->cur_samplerate_divider & 0xff;
612 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
613 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
615 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
618 /* Send extended sample limit and pre/post-trigger capture ratio. */
619 arg[0] = ((readcount - 1) & 0xff);
620 arg[1] = ((readcount - 1) & 0xff00) >> 8;
621 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
622 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
623 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
625 arg[0] = ((delaycount - 1) & 0xff);
626 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
627 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
628 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
629 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
633 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
634 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
635 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
636 devc->flag_reg & FLAG_RLE ? "on" : "off",
637 devc->flag_reg & FLAG_FILTER ? "on": "off",
638 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
641 * Enable/disable OLS channel groups in the flag register according
642 * to the channel mask. 1 means "disable channel".
644 devc->flag_reg &= ~0x3c;
645 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
646 sr_dbg("flag_reg = %x", devc->flag_reg);
649 * In demux mode the OLS is processing two 8-bit or 16-bit samples
650 * in parallel and for this to work the lower two bits of the four
651 * "channel_disable" bits must be replicated to the upper two bits.
653 flag_tmp = devc->flag_reg;
654 if (devc->flag_reg & FLAG_DEMUX) {
656 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
658 arg[0] = flag_tmp & 0xff;
659 arg[1] = flag_tmp >> 8;
660 arg[2] = arg[3] = 0x00;
661 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
664 /* Start acquisition on the device. */
665 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
668 /* Reset all operational states. */
669 devc->rle_count = devc->num_transfers = 0;
670 devc->num_samples = devc->num_bytes = 0;
671 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
672 memset(devc->sample, 0, 4);
674 std_session_send_df_header(sdi, LOG_PREFIX);
676 /* Hook up a dummy handler to receive data from the device. */
677 sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
678 (struct sr_dev_inst *)sdi);
683 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
685 struct dev_context *devc;
689 sr_dbg("Stopping acquisition.");
690 write_shortcommand(devc, CMD_RESET);
691 write_shortcommand(devc, CMD_RESET);
692 write_shortcommand(devc, CMD_RESET);
693 write_shortcommand(devc, CMD_RESET);
694 write_shortcommand(devc, CMD_RESET);
696 sr_session_source_remove(sdi->session, -1);
698 std_session_send_df_end(sdi, LOG_PREFIX);
703 SR_PRIV struct sr_dev_driver p_ols_driver_info = {
705 .longname = "Pipistrello OLS",
708 .cleanup = std_cleanup,
710 .dev_list = std_dev_list,
711 .dev_clear = dev_clear,
712 .config_get = config_get,
713 .config_set = config_set,
714 .config_list = config_list,
715 .dev_open = dev_open,
716 .dev_close = dev_close,
717 .dev_acquisition_start = dev_acquisition_start,
718 .dev_acquisition_stop = dev_acquisition_stop,