2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 struct ols_basic_trigger_desc {
24 uint32_t trigger_mask[NUM_BASIC_TRIGGER_STAGES];
25 uint32_t trigger_value[NUM_BASIC_TRIGGER_STAGES];
29 SR_PRIV int send_shortcommand(struct sr_serial_dev_inst *serial,
34 sr_dbg("Sending cmd 0x%.2x.", command);
36 if (serial_write_blocking(serial, buf, 1, serial_timeout(serial, 1)) != 1)
39 if (serial_drain(serial) != SR_OK)
45 SR_PRIV int send_longcommand(struct sr_serial_dev_inst *serial, uint8_t command,
50 sr_dbg("Sending cmd 0x%.2x data 0x%.2x%.2x%.2x%.2x.", command, data[0],
51 data[1], data[2], data[3]);
57 if (serial_write_blocking(serial, buf, 5, serial_timeout(serial, 1)) != 5)
60 if (serial_drain(serial) != SR_OK)
66 static int ols_send_longdata(struct sr_serial_dev_inst *serial, uint8_t command,
71 return send_longcommand(serial, command, data);
74 SR_PRIV int ols_send_reset(struct sr_serial_dev_inst *serial)
78 for (i = 0; i < 5; i++) {
79 if (send_shortcommand(serial, CMD_RESET) != SR_OK)
86 /* Configures the channel mask based on which channels are enabled. */
87 SR_PRIV uint32_t ols_channel_mask(const struct sr_dev_inst *sdi)
89 uint32_t channel_mask = 0;
90 for (const GSList *l = sdi->channels; l; l = l->next) {
91 struct sr_channel *channel = l->data;
93 channel_mask |= 1 << channel->index;
99 static int convert_trigger(const struct sr_dev_inst *sdi,
100 struct ols_basic_trigger_desc *ols_trigger)
102 struct sr_trigger *trigger;
103 struct sr_trigger_stage *stage;
104 struct sr_trigger_match *match;
108 ols_trigger->num_stages = 0;
109 for (i = 0; i < NUM_BASIC_TRIGGER_STAGES; i++) {
110 ols_trigger->trigger_mask[i] = 0;
111 ols_trigger->trigger_value[i] = 0;
114 if (!(trigger = sr_session_trigger_get(sdi->session)))
117 ols_trigger->num_stages = g_slist_length(trigger->stages);
118 if (ols_trigger->num_stages > NUM_BASIC_TRIGGER_STAGES) {
119 sr_err("This device only supports %d trigger stages.",
120 NUM_BASIC_TRIGGER_STAGES);
124 for (l = trigger->stages; l; l = l->next) {
126 for (m = stage->matches; m; m = m->next) {
128 if (!match->channel->enabled)
129 /* Ignore disabled channels with a trigger. */
131 ols_trigger->trigger_mask[stage->stage] |=
132 1 << match->channel->index;
133 if (match->match == SR_TRIGGER_ONE)
134 ols_trigger->trigger_value[stage->stage] |=
135 1 << match->channel->index;
142 static void ols_metadata_quirks(struct sr_dev_inst *sdi)
144 struct dev_context *devc;
153 is_shrimp = sdi->model && strcmp(sdi->model, "Shrimp1.0") == 0;
155 if (!devc->max_channels)
156 devc->max_channels = 4;
157 if (!devc->max_samples)
158 devc->max_samples = 256 * 1024;
159 if (!devc->max_samplerate)
160 devc->max_samplerate = SR_MHZ(20);
163 if (sdi->version && strstr(sdi->version, "FPGA version 3.07"))
164 devc->device_flags |= DEVICE_FLAG_IS_DEMON_CORE;
167 SR_PRIV int ols_get_metadata(struct sr_dev_inst *sdi)
169 struct sr_serial_dev_inst *serial;
170 struct dev_context *devc;
174 GString *tmp_str, *devname, *version;
180 devname = g_string_new("");
181 version = g_string_new("");
185 delay_ms = serial_timeout(serial, 1);
186 if (serial_read_blocking(serial, &key, 1, delay_ms) != 1)
188 if (key == METADATA_TOKEN_END) {
189 sr_dbg("Got metadata key 0x00, metadata ends.");
195 /* NULL-terminated string */
196 tmp_str = g_string_new("");
197 delay_ms = serial_timeout(serial, 1);
198 while (serial_read_blocking(serial, &tmp_c, 1,
201 g_string_append_c(tmp_str, tmp_c);
202 sr_dbg("Got metadata token 0x%.2x value '%s'.", key,
205 case METADATA_TOKEN_DEVICE_NAME:
208 g_string_append(devname, tmp_str->str);
210 case METADATA_TOKEN_FPGA_VERSION:
211 /* FPGA firmware version */
213 g_string_append(version, ", ");
214 g_string_append(version, "FPGA version ");
215 g_string_append(version, tmp_str->str);
217 case METADATA_TOKEN_ANCILLARY_VERSION:
218 /* Ancillary version */
220 g_string_append(version, ", ");
221 g_string_append(version, "Ancillary version ");
222 g_string_append(version, tmp_str->str);
225 sr_info("ols: unknown token 0x%.2x: '%s'", key,
229 g_string_free(tmp_str, TRUE);
232 /* 32-bit unsigned integer */
233 delay_ms = serial_timeout(serial, 4);
234 if (serial_read_blocking(serial, &tmp_int, 4,
237 tmp_int = RB32(&tmp_int);
238 sr_dbg("Got metadata token 0x%.2x value 0x%.8x.", key,
241 case METADATA_TOKEN_NUM_PROBES_LONG:
242 /* Number of usable channels */
243 devc->max_channels = tmp_int;
245 case METADATA_TOKEN_SAMPLE_MEMORY_BYTES:
246 /* Amount of sample memory available (bytes) */
247 devc->max_samples = tmp_int;
249 case METADATA_TOKEN_DYNAMIC_MEMORY_BYTES:
250 /* Amount of dynamic memory available (bytes) */
251 /* what is this for? */
253 case METADATA_TOKEN_MAX_SAMPLE_RATE_HZ:
254 /* Maximum sample rate (Hz) */
255 devc->max_samplerate = tmp_int;
257 case METADATA_TOKEN_PROTOCOL_VERSION_LONG:
258 /* protocol version */
259 devc->protocol_version = tmp_int;
262 sr_info("Unknown token 0x%.2x: 0x%.8x.", key,
268 /* 8-bit unsigned integer */
269 delay_ms = serial_timeout(serial, 1);
270 if (serial_read_blocking(serial, &tmp_c, 1, delay_ms) != 1)
272 sr_dbg("Got metadata token 0x%.2x value 0x%.2x.", key,
275 case METADATA_TOKEN_NUM_PROBES_SHORT:
276 /* Number of usable channels */
277 devc->max_channels = tmp_c;
279 case METADATA_TOKEN_PROTOCOL_VERSION_SHORT:
280 /* protocol version */
281 devc->protocol_version = tmp_c;
284 sr_info("Unknown token 0x%.2x: 0x%.2x.", key,
295 sdi->model = devname->str;
296 sdi->version = version->str;
297 g_string_free(devname, FALSE);
298 g_string_free(version, FALSE);
300 /* Optionally amend received metadata, model specific quirks. */
301 ols_metadata_quirks(sdi);
306 SR_PRIV int ols_set_samplerate(const struct sr_dev_inst *sdi,
307 const uint64_t samplerate)
309 struct dev_context *devc;
312 if (devc->max_samplerate && samplerate > devc->max_samplerate)
313 return SR_ERR_SAMPLERATE;
315 if (samplerate > CLOCK_RATE) {
316 sr_info("Enabling demux mode.");
317 devc->capture_flags |= CAPTURE_FLAG_DEMUX;
318 devc->capture_flags &= ~CAPTURE_FLAG_NOISE_FILTER;
319 devc->cur_samplerate_divider =
320 (CLOCK_RATE * 2 / samplerate) - 1;
322 sr_info("Disabling demux mode.");
323 devc->capture_flags &= ~CAPTURE_FLAG_DEMUX;
324 devc->capture_flags |= CAPTURE_FLAG_NOISE_FILTER;
325 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
328 /* Calculate actual samplerate used and complain if it is different
329 * from the requested.
331 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
332 if (devc->capture_flags & CAPTURE_FLAG_DEMUX)
333 devc->cur_samplerate *= 2;
334 if (devc->cur_samplerate != samplerate)
335 sr_info("Can't match samplerate %" PRIu64 ", using %" PRIu64
337 samplerate, devc->cur_samplerate);
342 SR_PRIV void abort_acquisition(const struct sr_dev_inst *sdi)
344 struct sr_serial_dev_inst *serial;
347 ols_send_reset(serial);
349 serial_source_remove(sdi->session, serial);
351 std_session_send_df_end(sdi);
354 SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data)
356 struct dev_context *devc;
357 struct sr_dev_inst *sdi;
358 struct sr_serial_dev_inst *serial;
359 struct sr_datafeed_packet packet;
360 struct sr_datafeed_logic logic;
362 int num_changroups, offset, j;
372 if (devc->num_transfers == 0 && revents == 0) {
373 /* Ignore timeouts as long as we haven't received anything */
377 if (devc->num_transfers++ == 0) {
378 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
379 if (!devc->raw_sample_buf) {
380 sr_err("Sample buffer malloc failed.");
383 /* fill with 1010... for debugging */
384 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
388 for (i = 0x20; i > 0x02; i >>= 1) {
389 if ((devc->capture_flags & i) == 0) {
394 if (revents == G_IO_IN && devc->num_samples < devc->limit_samples) {
395 if (serial_read_nonblocking(serial, &byte, 1) != 1)
399 /* Ignore it if we've read enough. */
400 if (devc->num_samples >= devc->limit_samples)
403 devc->sample[devc->num_bytes++] = byte;
404 sr_spew("Received byte 0x%.2x.", byte);
405 if (devc->num_bytes == num_changroups) {
407 devc->cnt_samples_rle++;
409 * Got a full sample. Convert from the OLS's little-endian
410 * sample to the local format.
412 sample = devc->sample[0] | (devc->sample[1] << 8) |
413 (devc->sample[2] << 16) |
414 (devc->sample[3] << 24);
415 sr_dbg("Received sample 0x%.*x.", devc->num_bytes * 2,
417 if (devc->capture_flags & CAPTURE_FLAG_RLE) {
419 * In RLE mode the high bit of the sample is the
420 * "count" flag, meaning this sample is the number
421 * of times the previous sample occurred.
423 if (devc->sample[devc->num_bytes - 1] & 0x80) {
424 /* Clear the high bit. */
425 sample &= ~(0x80 << (devc->num_bytes -
427 devc->rle_count = sample;
428 devc->cnt_samples_rle +=
430 sr_dbg("RLE count: %u.",
436 devc->num_samples += devc->rle_count + 1;
437 if (devc->num_samples > devc->limit_samples) {
438 /* Save us from overrunning the buffer. */
440 devc->num_samples - devc->limit_samples;
441 devc->num_samples = devc->limit_samples;
444 if (num_changroups < 4) {
446 * Some channel groups may have been turned
447 * off, to speed up transfer between the
448 * hardware and the PC. Expand that here before
449 * submitting it over the session bus --
450 * whatever is listening on the bus will be
451 * expecting a full 32-bit sample, based on
452 * the number of channels.
455 uint8_t tmp_sample[4] = { 0, 0, 0, 0 };
456 for (i = 0; i < 4; i++) {
457 if (((devc->capture_flags >> 2) &
460 * This channel group was
461 * enabled, copy from received
468 memcpy(devc->sample, tmp_sample, 4);
469 sr_spew("Expanded sample: 0x%.2hhx%.2hhx%.2hhx%.2hhx ",
470 devc->sample[3], devc->sample[2],
471 devc->sample[1], devc->sample[0]);
475 * the OLS sends its sample buffer backwards.
476 * store it in reverse order here, so we can dump
477 * this on the session bus later.
479 offset = (devc->limit_samples - devc->num_samples) * 4;
480 for (i = 0; i <= devc->rle_count; i++) {
481 memcpy(devc->raw_sample_buf + offset + (i * 4),
484 memset(devc->sample, 0, 4);
490 * This is the main loop telling us a timeout was reached, or
491 * we've acquired all the samples we asked for -- we're done.
492 * Send the (properly-ordered) buffer to the frontend.
494 sr_dbg("Received %d bytes, %d samples, %d decompressed samples.",
495 devc->cnt_bytes, devc->cnt_samples,
496 devc->cnt_samples_rle);
497 if (devc->trigger_at_smpl != OLS_NO_TRIGGER) {
499 * A trigger was set up, so we need to tell the frontend
502 if (devc->trigger_at_smpl > 0) {
503 /* There are pre-trigger samples, send those first. */
504 packet.type = SR_DF_LOGIC;
505 packet.payload = &logic;
506 logic.length = devc->trigger_at_smpl * 4;
508 logic.data = devc->raw_sample_buf +
509 (devc->limit_samples -
512 sr_session_send(sdi, &packet);
515 /* Send the trigger. */
516 std_session_send_df_trigger(sdi);
519 /* Send post-trigger / all captured samples. */
520 int num_pre_trigger_samples = devc->trigger_at_smpl ==
523 devc->trigger_at_smpl;
524 packet.type = SR_DF_LOGIC;
525 packet.payload = &logic;
527 (devc->num_samples - num_pre_trigger_samples) * 4;
529 logic.data = devc->raw_sample_buf +
530 (num_pre_trigger_samples + devc->limit_samples -
533 sr_session_send(sdi, &packet);
535 g_free(devc->raw_sample_buf);
537 serial_flush(serial);
538 abort_acquisition(sdi);
545 ols_set_basic_trigger_stage(const struct ols_basic_trigger_desc *trigger_desc,
546 struct sr_serial_dev_inst *serial, int stage)
550 cmd = CMD_SET_BASIC_TRIGGER_MASK0 + stage * 4;
551 if (ols_send_longdata(serial, cmd, trigger_desc->trigger_mask[stage]) != SR_OK)
554 cmd = CMD_SET_BASIC_TRIGGER_VALUE0 + stage * 4;
555 if (ols_send_longdata(serial, cmd, trigger_desc->trigger_value[stage]) != SR_OK)
558 cmd = CMD_SET_BASIC_TRIGGER_CONFIG0 + stage * 4;
559 arg[0] = arg[1] = arg[3] = 0x00;
561 if (stage == trigger_desc->num_stages - 1)
562 /* Last stage, fire when this one matches. */
563 arg[3] |= TRIGGER_START;
564 if (send_longcommand(serial, cmd, arg) != SR_OK)
570 SR_PRIV int ols_prepare_acquisition(const struct sr_dev_inst *sdi)
574 struct dev_context *devc = sdi->priv;
575 struct sr_serial_dev_inst *serial = sdi->conn;
577 int num_changroups = 0;
578 uint8_t changroup_mask = 0;
579 uint32_t channel_mask = ols_channel_mask(sdi);
580 for (unsigned int i = 0; i < 4; i++) {
581 if (channel_mask & (0xff << (i * 8))) {
582 changroup_mask |= (1 << i);
588 * Limit readcount to prevent reading past the end of the hardware
589 * buffer. Rather read too many samples than too few.
591 uint32_t samplecount =
592 MIN(devc->max_samples / num_changroups, devc->limit_samples);
593 uint32_t readcount = (samplecount + 3) / 4;
596 /* Basic triggers. */
597 struct ols_basic_trigger_desc basic_trigger_desc;
598 if (convert_trigger(sdi, &basic_trigger_desc) != SR_OK) {
599 sr_err("Failed to configure channels.");
602 if (basic_trigger_desc.num_stages > 0) {
604 * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
605 * reset command must be send prior each arm command
607 sr_dbg("Send reset command before trigger configure");
608 if (ols_send_reset(serial) != SR_OK)
611 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
612 devc->trigger_at_smpl = (readcount - delaycount) * 4 -
613 basic_trigger_desc.num_stages;
614 for (int i = 0; i < basic_trigger_desc.num_stages; i++) {
615 sr_dbg("Setting OLS stage %d trigger.", i);
616 if ((ret = ols_set_basic_trigger_stage(
617 &basic_trigger_desc, serial, i)) != SR_OK)
621 /* No triggers configured, force trigger on first stage. */
622 sr_dbg("Forcing trigger at stage 0.");
623 basic_trigger_desc.num_stages = 1;
624 if ((ret = ols_set_basic_trigger_stage(&basic_trigger_desc,
625 serial, 0)) != SR_OK)
627 delaycount = readcount;
631 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
632 devc->cur_samplerate, devc->cur_samplerate_divider);
633 if (ols_send_longdata(serial, CMD_SET_DIVIDER,
634 devc->cur_samplerate_divider & 0x00FFFFFF) != SR_OK)
637 /* Send sample limit and pre/post-trigger capture ratio. */
638 sr_dbg("Setting sample limit %d, trigger point at %d",
639 (readcount - 1) * 4, (delaycount - 1) * 4);
641 if (devc->max_samples > 256 * 1024) {
642 if (ols_send_longdata(serial, CMD_CAPTURE_READCOUNT,
643 readcount - 1) != SR_OK)
645 if (ols_send_longdata(serial, CMD_CAPTURE_DELAYCOUNT,
646 delaycount - 1) != SR_OK)
650 WL16(&arg[0], readcount - 1);
651 WL16(&arg[2], delaycount - 1);
652 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
657 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s, "
659 devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE ? "on" :
661 devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE ? "on" :
663 devc->capture_flags & CAPTURE_FLAG_RLE ? "on" : "off",
664 devc->capture_flags & CAPTURE_FLAG_NOISE_FILTER ? "on" : "off",
665 devc->capture_flags & CAPTURE_FLAG_DEMUX ? "on" : "off",
666 devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? "external" :
668 devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ?
669 (devc->capture_flags & CAPTURE_FLAG_INVERT_EXT_CLOCK ?
675 * Enable/disable OLS channel groups in the flag register according
676 * to the channel mask. 1 means "disable channel".
678 devc->capture_flags &= ~0x3c;
679 devc->capture_flags |= ~(changroup_mask << 2) & 0x3c;
681 /* RLE mode is always zero, for now. */
683 if (ols_send_longdata(serial, CMD_SET_FLAGS, devc->capture_flags) != SR_OK)