2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H
23 #define LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H
30 #include <libsigrok/libsigrok.h>
31 #include "libsigrok-internal.h"
33 #define LOG_PREFIX "asix-sigma"
35 #define USB_VENDOR 0xa600
36 #define USB_PRODUCT 0xa000
37 #define USB_DESCRIPTION "ASIX SIGMA"
38 #define USB_VENDOR_NAME "ASIX"
39 #define USB_MODEL_NAME "SIGMA"
41 enum sigma_write_register {
42 WRITE_CLOCK_SELECT = 0,
43 WRITE_TRIGGER_SELECT0 = 1,
44 WRITE_TRIGGER_SELECT1 = 2,
47 WRITE_POST_TRIGGER = 5,
48 WRITE_TRIGGER_OPTION = 6,
54 enum sigma_read_register {
56 READ_TRIGGER_POS_LOW = 1,
57 READ_TRIGGER_POS_HIGH = 2,
58 READ_TRIGGER_POS_UP = 3,
59 READ_STOP_POS_LOW = 4,
60 READ_STOP_POS_HIGH = 5,
63 READ_PIN_CHANGE_LOW = 8,
64 READ_PIN_CHANGE_HIGH = 9,
65 READ_BLOCK_LAST_TS_LOW = 10,
66 READ_BLOCK_LAST_TS_HIGH = 11,
72 #define REG_ADDR_LOW (0x0 << 4)
73 #define REG_ADDR_HIGH (0x1 << 4)
74 #define REG_DATA_LOW (0x2 << 4)
75 #define REG_DATA_HIGH_WRITE (0x3 << 4)
76 #define REG_READ_ADDR (0x4 << 4)
77 #define REG_DRAM_WAIT_ACK (0x5 << 4)
79 /* Bit (1 << 4) can be low or high (double buffer / cache) */
80 #define REG_DRAM_BLOCK (0x6 << 4)
81 #define REG_DRAM_BLOCK_BEGIN (0x8 << 4)
82 #define REG_DRAM_BLOCK_DATA (0xa << 4)
89 #define EVENTS_PER_CLUSTER 7
91 #define CHUNK_SIZE 1024
94 * The entire ASIX Sigma DRAM is an array of struct sigma_dram_line[1024];
97 /* One "DRAM cluster" contains a timestamp and 7 samples, 16b total. */
98 struct sigma_dram_cluster {
100 uint8_t timestamp_hi;
107 /* One "DRAM line" contains 64 "DRAM clusters", 1024b total. */
108 struct sigma_dram_line {
109 struct sigma_dram_cluster cluster[64];
112 struct clockselect_50 {
115 uint16_t disabled_channels;
118 /* The effect of all these are still a bit unclear. */
119 struct triggerinout {
120 uint8_t trgout_resistor_enable : 1;
121 uint8_t trgout_resistor_pullup : 1;
122 uint8_t reserved1 : 1;
123 uint8_t trgout_bytrigger : 1;
124 uint8_t trgout_byevent : 1;
125 uint8_t trgout_bytriggerin : 1;
126 uint8_t reserved2 : 2;
128 /* Should be set same as the first two */
129 uint8_t trgout_resistor_enable2 : 1;
130 uint8_t trgout_resistor_pullup2 : 1;
132 uint8_t reserved3 : 1;
133 uint8_t trgout_long : 1;
134 uint8_t trgout_pin : 1; /* Use 1k resistor. Pullup? */
135 uint8_t trgin_negate : 1;
136 uint8_t trgout_enable : 1;
137 uint8_t trgin_enable : 1;
141 /* The actual LUTs. */
142 uint16_t m0d[4], m1d[4], m2d[4];
143 uint16_t m3, m3s, m4;
145 /* Parameters should be sent as a single register write. */
148 uint8_t selpresc : 6;
160 /* Trigger configuration */
161 struct sigma_trigger {
162 /* Only two channels can be used in mask. */
164 uint16_t fallingmask;
166 /* Simple trigger support (<= 50 MHz). */
168 uint16_t simplevalue;
170 /* TODO: Advanced trigger support (boolean expressions). */
173 /* Events for trigger operation. */
185 /* Logical functions for trigger operation. */
197 SIGMA_UNINITIALIZED = 0,
207 /* Private, per-device-instance driver context. */
209 struct ftdi_context ftdic;
210 uint64_t cur_samplerate;
213 uint64_t limit_samples;
214 struct timeval start_tv;
218 int samples_per_event;
220 struct sigma_trigger trigger;
222 struct sigma_state state;
225 extern SR_PRIV const uint64_t samplerates[];
226 extern SR_PRIV const size_t samplerates_count;
228 SR_PRIV int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
229 struct dev_context *devc);
230 SR_PRIV int sigma_set_register(uint8_t reg, uint8_t value, struct dev_context *devc);
231 SR_PRIV int sigma_write_trigger_lut(struct triggerlut *lut, struct dev_context *devc);
232 SR_PRIV void sigma_clear_helper(void *priv);
233 SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate);
234 SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi);
235 SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data);
236 SR_PRIV int sigma_build_basic_trigger(struct triggerlut *lut, struct dev_context *devc);