2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA/SIGMA2 logic analyzer driver
30 * Channel numbers seem to go from 1-16, according to this image:
31 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
32 * (the cable has two additional GND pins, and a TI and TO pin)
34 static const char *channel_names[] = {
35 "1", "2", "3", "4", "5", "6", "7", "8",
36 "9", "10", "11", "12", "13", "14", "15", "16",
39 static const uint32_t drvopts[] = {
40 SR_CONF_LOGIC_ANALYZER,
43 static const uint32_t devopts[] = {
44 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
45 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47 #if ASIX_SIGMA_WITH_TRIGGER
48 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
49 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
53 #if ASIX_SIGMA_WITH_TRIGGER
54 static const int32_t trigger_matches[] = {
62 static void clear_helper(struct dev_context *devc)
64 ftdi_deinit(&devc->ftdic);
67 static int dev_clear(const struct sr_dev_driver *di)
69 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
72 static GSList *scan(struct sr_dev_driver *di, GSList *options)
74 struct sr_dev_inst *sdi;
75 struct dev_context *devc;
76 struct ftdi_device_list *devlist;
84 devc = g_malloc0(sizeof(struct dev_context));
86 ftdi_init(&devc->ftdic);
88 /* Look for SIGMAs. */
90 if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
91 USB_VENDOR, USB_PRODUCT)) <= 0) {
93 sr_err("ftdi_usb_find_all(): %d", ret);
97 /* Make sure it's a version 1 or 2 SIGMA. */
98 ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
99 serial_txt, sizeof(serial_txt));
100 sscanf(serial_txt, "%x", &serial);
102 if (serial < 0xa6010000 || serial > 0xa602ffff) {
103 sr_err("Only SIGMA and SIGMA2 are supported "
104 "in this version of libsigrok.");
108 sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
110 devc->cur_samplerate = samplerates[0];
111 devc->limit_msec = 0;
112 devc->limit_samples = 0;
113 devc->cur_firmware = -1;
114 devc->num_channels = 0;
115 devc->samples_per_event = 0;
116 devc->capture_ratio = 50;
117 devc->use_triggers = 0;
119 /* Register SIGMA device. */
120 sdi = g_malloc0(sizeof(struct sr_dev_inst));
121 sdi->status = SR_ST_INITIALIZING;
122 sdi->vendor = g_strdup(USB_VENDOR_NAME);
123 sdi->model = g_strdup(USB_MODEL_NAME);
125 for (i = 0; i < ARRAY_SIZE(channel_names); i++)
126 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
130 /* We will open the device again when we need it. */
131 ftdi_list_free(&devlist);
133 return std_scan_complete(di, g_slist_append(NULL, sdi));
136 ftdi_deinit(&devc->ftdic);
141 static int dev_open(struct sr_dev_inst *sdi)
143 struct dev_context *devc;
148 if ((ret = ftdi_usb_open_desc(&devc->ftdic,
149 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
150 sr_err("Failed to open device (%d): %s.",
151 ret, ftdi_get_error_string(&devc->ftdic));
158 static int dev_close(struct sr_dev_inst *sdi)
160 struct dev_context *devc;
164 return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR;
167 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
168 const struct sr_channel_group *cg)
170 struct dev_context *devc;
179 case SR_CONF_SAMPLERATE:
180 *data = g_variant_new_uint64(devc->cur_samplerate);
182 case SR_CONF_LIMIT_MSEC:
183 *data = g_variant_new_uint64(devc->limit_msec);
185 case SR_CONF_LIMIT_SAMPLES:
186 *data = g_variant_new_uint64(devc->limit_samples);
188 #if ASIX_SIGMA_WITH_TRIGGER
189 case SR_CONF_CAPTURE_RATIO:
190 *data = g_variant_new_uint64(devc->capture_ratio);
200 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
201 const struct sr_channel_group *cg)
203 struct dev_context *devc;
213 case SR_CONF_SAMPLERATE:
214 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
216 case SR_CONF_LIMIT_MSEC:
217 tmp = g_variant_get_uint64(data);
219 devc->limit_msec = g_variant_get_uint64(data);
223 case SR_CONF_LIMIT_SAMPLES:
224 tmp = g_variant_get_uint64(data);
225 devc->limit_samples = tmp;
226 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
228 #if ASIX_SIGMA_WITH_TRIGGER
229 case SR_CONF_CAPTURE_RATIO:
230 tmp = g_variant_get_uint64(data);
233 devc->capture_ratio = tmp;
243 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
244 const struct sr_channel_group *cg)
252 case SR_CONF_DEVICE_OPTIONS:
254 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
255 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
257 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
258 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
260 case SR_CONF_SAMPLERATE:
261 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
262 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
263 samplerates_count, sizeof(samplerates[0]));
264 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
265 *data = g_variant_builder_end(&gvb);
267 #if ASIX_SIGMA_WITH_TRIGGER
268 case SR_CONF_TRIGGER_MATCH:
269 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
270 trigger_matches, ARRAY_SIZE(trigger_matches),
281 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
283 struct dev_context *devc;
284 struct clockselect_50 clockselect;
286 uint8_t triggerselect;
287 struct triggerinout triggerinout_conf;
288 struct triggerlut lut;
290 uint8_t clock_bytes[sizeof(clockselect)];
295 if (sigma_convert_trigger(sdi) != SR_OK) {
296 sr_err("Failed to configure triggers.");
300 /* If the samplerate has not been set, default to 200 kHz. */
301 if (devc->cur_firmware == -1) {
302 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
306 /* Enter trigger programming mode. */
307 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
310 if (devc->cur_samplerate >= SR_MHZ(100)) {
311 /* 100 and 200 MHz mode. */
312 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
314 /* Find which pin to trigger on from mask. */
315 for (triggerpin = 0; triggerpin < 8; triggerpin++)
316 if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
320 /* Set trigger pin and light LED on trigger. */
321 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
323 /* Default rising edge. */
324 if (devc->trigger.fallingmask)
325 triggerselect |= 1 << 3;
327 } else if (devc->cur_samplerate <= SR_MHZ(50)) {
328 /* All other modes. */
329 sigma_build_basic_trigger(&lut, devc);
331 sigma_write_trigger_lut(&lut, devc);
333 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
336 /* Setup trigger in and out pins to default values. */
337 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
338 triggerinout_conf.trgout_bytrigger = 1;
339 triggerinout_conf.trgout_enable = 1;
341 sigma_write_register(WRITE_TRIGGER_OPTION,
342 (uint8_t *) &triggerinout_conf,
343 sizeof(struct triggerinout), devc);
345 /* Go back to normal mode. */
346 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
348 /* Set clock select register. */
349 clockselect.async = 0;
350 clockselect.fraction = 1 - 1; /* Divider 1. */
351 clockselect.disabled_channels = 0x0000; /* All channels enabled. */
352 if (devc->cur_samplerate == SR_MHZ(200)) {
353 /* Enable 4 channels. */
354 clockselect.disabled_channels = 0xf0ff;
355 } else if (devc->cur_samplerate == SR_MHZ(100)) {
356 /* Enable 8 channels. */
357 clockselect.disabled_channels = 0x00ff;
360 * 50 MHz mode, or fraction thereof. The 50MHz reference
361 * can get divided by any integer in the range 1 to 256.
362 * Divider minus 1 gets written to the hardware.
363 * (The driver lists a discrete set of sample rates, but
364 * all of them fit the above description.)
366 clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
369 clock_bytes[clock_idx++] = clockselect.async;
370 clock_bytes[clock_idx++] = clockselect.fraction;
371 clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
372 clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
373 sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
375 /* Setup maximum post trigger time. */
376 sigma_set_register(WRITE_POST_TRIGGER,
377 (devc->capture_ratio * 255) / 100, devc);
379 /* Start acqusition. */
380 devc->start_time = g_get_monotonic_time();
381 regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
382 #if ASIX_SIGMA_WITH_TRIGGER
385 sigma_set_register(WRITE_MODE, regval, devc);
387 std_session_send_df_header(sdi);
389 /* Add capture source. */
390 sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
392 devc->state.state = SIGMA_CAPTURE;
397 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
399 struct dev_context *devc;
402 devc->state.state = SIGMA_IDLE;
404 sr_session_source_remove(sdi->session, -1);
409 static struct sr_dev_driver asix_sigma_driver_info = {
410 .name = "asix-sigma",
411 .longname = "ASIX SIGMA/SIGMA2",
414 .cleanup = std_cleanup,
416 .dev_list = std_dev_list,
417 .dev_clear = dev_clear,
418 .config_get = config_get,
419 .config_set = config_set,
420 .config_list = config_list,
421 .dev_open = dev_open,
422 .dev_close = dev_close,
423 .dev_acquisition_start = dev_acquisition_start,
424 .dev_acquisition_stop = dev_acquisition_stop,
427 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);