2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
7 * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation, either version 3 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program. If not, see <http://www.gnu.org/licenses/>.
27 * Channels are labelled 1-16, see this vendor's image of the cable:
28 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg (TI/TO are
29 * additional trigger in/out signals).
31 static const char *channel_names[] = {
32 "1", "2", "3", "4", "5", "6", "7", "8",
33 "9", "10", "11", "12", "13", "14", "15", "16",
36 static const uint32_t scanopts[] = {
40 static const uint32_t drvopts[] = {
41 SR_CONF_LOGIC_ANALYZER,
44 static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
47 SR_CONF_CONN | SR_CONF_GET,
48 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
49 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
50 SR_CONF_EXTERNAL_CLOCK_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
53 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
54 /* Consider SR_CONF_TRIGGER_PATTERN (SR_T_STRING, GET/SET) support. */
57 static const char *ext_clock_edges[] = {
58 [SIGMA_CLOCK_EDGE_RISING] = "rising",
59 [SIGMA_CLOCK_EDGE_FALLING] = "falling",
60 [SIGMA_CLOCK_EDGE_EITHER] = "either",
63 static const int32_t trigger_matches[] = {
70 static void clear_helper(struct dev_context *devc)
72 (void)sigma_force_close(devc);
75 static int dev_clear(const struct sr_dev_driver *di)
77 return std_dev_clear_with_callback(di,
78 (std_dev_clear_callback)clear_helper);
81 static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
83 struct sr_usb_dev_inst *usb;
85 for (/* EMPTY */; devs; devs = devs->next) {
87 if (usb->bus == bus && usb->address == addr)
94 static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
96 gboolean is_sigma, is_omega;
98 if (des->idVendor != USB_VENDOR_ASIX)
100 is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
101 is_omega = des->idProduct == USB_PRODUCT_OMEGA;
102 if (!is_sigma && !is_omega)
107 static GSList *scan(struct sr_dev_driver *di, GSList *options)
109 struct drv_context *drvc;
110 libusb_context *usbctx;
112 GSList *l, *conn_devices;
113 struct sr_config *src;
115 libusb_device **devlist, *devitem;
117 struct libusb_device_descriptor des;
118 struct libusb_device_handle *hdl;
123 unsigned long serno_num, serno_pre;
124 enum asix_device_type dev_type;
125 const char *dev_text;
126 struct sr_dev_inst *sdi;
127 struct dev_context *devc;
128 size_t devidx, chidx;
131 usbctx = drvc->sr_ctx->libusb_ctx;
133 /* Find all devices which match an (optional) conn= spec. */
135 for (l = options; l; l = l->next) {
139 conn = g_variant_get_string(src->data, NULL);
145 conn_devices = sr_usb_find(usbctx, conn);
146 if (conn && !conn_devices)
149 /* Find all ASIX logic analyzers (which match the connection spec). */
151 libusb_get_device_list(usbctx, &devlist);
152 for (devidx = 0; devlist[devidx]; devidx++) {
153 devitem = devlist[devidx];
155 /* Check for connection match if a user spec was given. */
156 bus = libusb_get_bus_number(devitem);
157 addr = libusb_get_device_address(devitem);
158 if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
160 snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);
163 * Check for known VID:PID pairs. Get the serial number,
164 * to then derive the device type from it.
166 libusb_get_device_descriptor(devitem, &des);
167 if (!known_vid_pid(&des))
169 if (!des.iSerialNumber) {
170 sr_warn("Cannot get serial number (index 0).");
173 ret = libusb_open(devitem, &hdl);
175 sr_warn("Cannot open USB device %04x.%04x: %s.",
176 des.idVendor, des.idProduct,
177 libusb_error_name(ret));
180 ret = libusb_get_string_descriptor_ascii(hdl,
182 (unsigned char *)serno_txt, sizeof(serno_txt));
184 sr_warn("Cannot get serial number (%s).",
185 libusb_error_name(ret));
192 * All ASIX logic analyzers have a serial number, which
193 * reads as a hex number, and tells the device type.
195 ret = sr_atoul_base(serno_txt, &serno_num, &end, 16);
196 if (ret != SR_OK || !end || *end) {
197 sr_warn("Cannot interpret serial number %s.", serno_txt);
200 dev_type = ASIX_TYPE_NONE;
202 serno_pre = serno_num >> 16;
205 dev_type = ASIX_TYPE_SIGMA;
207 sr_info("Found SIGMA, serno %s.", serno_txt);
210 dev_type = ASIX_TYPE_SIGMA;
212 sr_info("Found SIGMA2, serno %s.", serno_txt);
215 dev_type = ASIX_TYPE_OMEGA;
217 sr_info("Found OMEGA, serno %s.", serno_txt);
218 if (!ASIX_WITH_OMEGA) {
219 sr_warn("OMEGA support is not implemented yet.");
224 sr_warn("Unknown serno %s, skipping.", serno_txt);
228 /* Create a device instance, add it to the result set. */
230 sdi = g_malloc0(sizeof(*sdi));
231 devices = g_slist_append(devices, sdi);
232 sdi->status = SR_ST_INITIALIZING;
233 sdi->vendor = g_strdup("ASIX");
234 sdi->model = g_strdup(dev_text);
235 sdi->serial_num = g_strdup(serno_txt);
236 sdi->connection_id = g_strdup(conn_id);
237 for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
238 sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
239 TRUE, channel_names[chidx]);
241 devc = g_malloc0(sizeof(*devc));
243 devc->id.vid = des.idVendor;
244 devc->id.pid = des.idProduct;
245 devc->id.serno = serno_num;
246 devc->id.prefix = serno_pre;
247 devc->id.type = dev_type;
248 sr_sw_limits_init(&devc->limit.config);
249 devc->capture_ratio = 50;
250 devc->use_triggers = FALSE;
252 /* Get current hardware configuration (or use defaults). */
253 (void)sigma_fetch_hw_config(sdi);
255 libusb_free_device_list(devlist, 1);
256 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
258 return std_scan_complete(di, devices);
261 static int dev_open(struct sr_dev_inst *sdi)
263 struct dev_context *devc;
267 if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
268 sr_err("OMEGA support is not implemented yet.");
272 return sigma_force_open(sdi);
275 static int dev_close(struct sr_dev_inst *sdi)
277 struct dev_context *devc;
281 return sigma_force_close(devc);
284 static int config_get(uint32_t key, GVariant **data,
285 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
287 struct dev_context *devc;
288 const char *clock_text;
298 *data = g_variant_new_string(sdi->connection_id);
300 case SR_CONF_SAMPLERATE:
301 *data = g_variant_new_uint64(devc->clock.samplerate);
303 case SR_CONF_EXTERNAL_CLOCK:
304 *data = g_variant_new_boolean(devc->clock.use_ext_clock);
306 case SR_CONF_EXTERNAL_CLOCK_SOURCE:
307 clock_text = channel_names[devc->clock.clock_pin];
308 *data = g_variant_new_string(clock_text);
310 case SR_CONF_CLOCK_EDGE:
311 clock_text = ext_clock_edges[devc->clock.clock_edge];
312 *data = g_variant_new_string(clock_text);
314 case SR_CONF_LIMIT_MSEC:
315 case SR_CONF_LIMIT_SAMPLES:
316 return sr_sw_limits_config_get(&devc->limit.config, key, data);
317 case SR_CONF_CAPTURE_RATIO:
318 *data = g_variant_new_uint64(devc->capture_ratio);
327 static int config_set(uint32_t key, GVariant *data,
328 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
330 struct dev_context *devc;
332 uint64_t want_rate, have_rate;
340 case SR_CONF_SAMPLERATE:
341 want_rate = g_variant_get_uint64(data);
342 ret = sigma_normalize_samplerate(want_rate, &have_rate);
345 if (have_rate != want_rate) {
346 char *text_want, *text_have;
347 text_want = sr_samplerate_string(want_rate);
348 text_have = sr_samplerate_string(have_rate);
349 sr_info("Adjusted samplerate %s to %s.",
350 text_want, text_have);
354 devc->clock.samplerate = have_rate;
356 case SR_CONF_EXTERNAL_CLOCK:
357 devc->clock.use_ext_clock = g_variant_get_boolean(data);
359 case SR_CONF_EXTERNAL_CLOCK_SOURCE:
360 idx = std_str_idx(data, ARRAY_AND_SIZE(channel_names));
363 devc->clock.clock_pin = idx;
365 case SR_CONF_CLOCK_EDGE:
366 idx = std_str_idx(data, ARRAY_AND_SIZE(ext_clock_edges));
369 devc->clock.clock_edge = idx;
371 case SR_CONF_LIMIT_MSEC:
372 case SR_CONF_LIMIT_SAMPLES:
373 return sr_sw_limits_config_set(&devc->limit.config, key, data);
374 case SR_CONF_CAPTURE_RATIO:
375 devc->capture_ratio = g_variant_get_uint64(data);
384 static int config_list(uint32_t key, GVariant **data,
385 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
388 case SR_CONF_SCAN_OPTIONS:
389 case SR_CONF_DEVICE_OPTIONS:
392 return STD_CONFIG_LIST(key, data, sdi, cg,
393 scanopts, drvopts, devopts);
394 case SR_CONF_SAMPLERATE:
395 *data = sigma_get_samplerates_list();
397 case SR_CONF_EXTERNAL_CLOCK_SOURCE:
398 *data = g_variant_new_strv(ARRAY_AND_SIZE(channel_names));
400 case SR_CONF_CLOCK_EDGE:
401 *data = g_variant_new_strv(ARRAY_AND_SIZE(ext_clock_edges));
403 case SR_CONF_TRIGGER_MATCH:
404 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
413 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
415 struct dev_context *devc;
416 uint16_t pindis_mask;
421 struct triggerinout triggerinout_conf;
422 struct triggerlut lut;
423 uint8_t regval, cmd_bytes[4], *wrptr;
427 /* Convert caller's trigger spec to driver's internal format. */
428 ret = sigma_convert_trigger(sdi);
430 sr_err("Could not configure triggers.");
435 * Setup the device's samplerate from the value which up to now
436 * just got checked and stored. As a byproduct this can pick and
437 * send firmware to the device, reduce the number of available
438 * logic channels, etc.
440 * Determine an acquisition timeout from optionally configured
441 * sample count or time limits. Which depends on the samplerate.
442 * Force 50MHz samplerate when external clock is in use.
444 if (devc->clock.use_ext_clock) {
445 if (devc->clock.samplerate != SR_MHZ(50))
446 sr_info("External clock, forcing 50MHz samplerate.");
447 devc->clock.samplerate = SR_MHZ(50);
449 ret = sigma_set_samplerate(sdi);
452 ret = sigma_set_acquire_timeout(devc);
456 /* Enter trigger programming mode. */
457 trigsel2 = TRGSEL2_RESET;
458 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
463 if (devc->clock.samplerate >= SR_MHZ(100)) {
464 /* 100 and 200 MHz mode. */
465 /* TODO Decipher the 0x81 magic number's purpose. */
466 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
470 /* Find which pin to trigger on from mask. */
471 for (triggerpin = 0; triggerpin < 8; triggerpin++) {
472 if (devc->trigger.risingmask & BIT(triggerpin))
474 if (devc->trigger.fallingmask & BIT(triggerpin))
478 /* Set trigger pin and light LED on trigger. */
479 trigsel2 = triggerpin & TRGSEL2_PINS_MASK;
480 trigsel2 |= TRGSEL2_LEDSEL1;
482 /* Default rising edge. */
483 /* TODO Documentation disagrees, bit set means _rising_ edge. */
484 if (devc->trigger.fallingmask)
485 trigsel2 |= TRGSEL2_PINPOL_RISE;
487 } else if (devc->clock.samplerate <= SR_MHZ(50)) {
488 /* 50MHz firmware modes. */
490 /* Translate application specs to hardware perspective. */
491 ret = sigma_build_basic_trigger(devc, &lut);
495 /* Communicate resulting register values to the device. */
496 ret = sigma_write_trigger_lut(devc, &lut);
500 trigsel2 = TRGSEL2_LEDSEL1 | TRGSEL2_LEDSEL0;
503 /* Setup trigger in and out pins to default values. */
504 memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
505 triggerinout_conf.trgout_bytrigger = TRUE;
506 triggerinout_conf.trgout_enable = TRUE;
508 * Verify the correctness of this implementation. The previous
509 * version used to assign to a C language struct with bit fields
510 * which is highly non-portable and hard to guess the resulting
511 * raw memory layout or wire transfer content. The C struct's
512 * field names did not match the vendor documentation's names.
513 * Which means that I could not verify "on paper" either. Let's
514 * re-visit this code later during research for trigger support.
518 if (triggerinout_conf.trgout_bytrigger)
519 regval |= TRGOPT_TRGOOUTEN;
520 write_u8_inc(&wrptr, regval);
521 regval &= ~TRGOPT_CLEAR_MASK;
522 if (triggerinout_conf.trgout_enable)
523 regval |= TRGOPT_TRGOEN;
524 write_u8_inc(&wrptr, regval);
525 ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
526 cmd_bytes, wrptr - cmd_bytes);
530 /* Leave trigger programming mode. */
531 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
536 * Samplerate dependent clock and channels configuration. Some
537 * channels by design are not available at higher clock rates.
538 * Register layout differs between firmware variants (depth 1
539 * with LSB channel mask above 50MHz, depth 4 with more details
542 * Derive a mask where bits are set for unavailable channels.
543 * Either send the single byte, or the full byte sequence.
545 pindis_mask = ~BITS_MASK(devc->interp.num_channels);
546 if (devc->clock.samplerate > SR_MHZ(50)) {
547 ret = sigma_set_register(devc, WRITE_CLOCK_SELECT,
551 /* Select 50MHz base clock, and divider. */
553 div = SR_MHZ(50) / devc->clock.samplerate - 1;
554 if (devc->clock.use_ext_clock) {
555 async = CLKSEL_CLKSEL8;
556 div = devc->clock.clock_pin + 1;
557 switch (devc->clock.clock_edge) {
558 case SIGMA_CLOCK_EDGE_RISING:
559 div |= CLKSEL_RISING;
561 case SIGMA_CLOCK_EDGE_FALLING:
562 div |= CLKSEL_FALLING;
564 case SIGMA_CLOCK_EDGE_EITHER:
565 div |= CLKSEL_RISING;
566 div |= CLKSEL_FALLING;
570 write_u8_inc(&wrptr, async);
571 write_u8_inc(&wrptr, div);
572 write_u16be_inc(&wrptr, pindis_mask);
573 ret = sigma_write_register(devc, WRITE_CLOCK_SELECT,
574 cmd_bytes, wrptr - cmd_bytes);
579 /* Setup maximum post trigger time. */
580 ret = sigma_set_register(devc, WRITE_POST_TRIGGER,
581 (devc->capture_ratio * 255) / 100);
585 /* Start acqusition. */
586 regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
587 if (devc->use_triggers)
589 ret = sigma_set_register(devc, WRITE_MODE, regval);
593 ret = std_session_send_df_header(sdi);
597 /* Add capture source. */
598 ret = sr_session_source_add(sdi->session, -1, 0, 10,
599 sigma_receive_data, (void *)sdi);
603 devc->state = SIGMA_CAPTURE;
608 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
610 struct dev_context *devc;
615 * When acquisition is currently running, keep the receive
616 * routine registered and have it stop the acquisition upon the
617 * next invocation. Else unregister the receive routine here
618 * already. The detour is required to have sample data retrieved
619 * for forced acquisition stops.
621 if (devc->state == SIGMA_CAPTURE) {
622 devc->state = SIGMA_STOPPING;
624 devc->state = SIGMA_IDLE;
625 (void)sr_session_source_remove(sdi->session, -1);
631 static struct sr_dev_driver asix_sigma_driver_info = {
632 .name = "asix-sigma",
633 .longname = "ASIX SIGMA/SIGMA2",
636 .cleanup = std_cleanup,
638 .dev_list = std_dev_list,
639 .dev_clear = dev_clear,
640 .config_get = config_get,
641 .config_set = config_set,
642 .config_list = config_list,
643 .dev_open = dev_open,
644 .dev_close = dev_close,
645 .dev_acquisition_start = dev_acquisition_start,
646 .dev_acquisition_stop = dev_acquisition_stop,
649 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);