1 -------------------------------------------------------------------------------
3 -------------------------------------------------------------------------------
5 This is a set of example captures of JTAG communication to an Olimex
6 STM32-H103 eval board with an ST STM32 (ARM Cortex-M3) microcontroller.
8 The JTAG adapter used was the FTDI FT2232H based Floss-JTAG (V0.2).
10 The firmware flashed to the board is a simple LED-blinking libopencm3
11 example named 'fancyblink'. The respective fancyblink.bin file is
12 available as a reference in the same directory as this README.
13 The file's MD5 sum is aa6980d55b9ced84fc0c64bfe9e5ff98.
16 http://olimex.com/dev/stm32-h103.html
17 http://randomprojects.org/wiki/Floss-JTAG
19 http://libopencm3.git.sourceforge.net/git/gitweb.cgi?p=libopencm3/libopencm3;a=tree;f=examples/stm32/f1/stm32-h103/fancyblink
25 The logic analyzer used for capturing was a Saleae Logic:
27 Probe STM32-H103 JTAG connector
28 -------------------------------------
37 olimex_stm32-h103_flash_fancyblink.sr
38 -------------------------------------
40 The OpenOCD used was "0.5.0 (2011-08-09-08:45)" (Debian version 0.5.0-1):
42 openocd -f interface/flossjtag-noeeprom.cfg \
43 -f board/olimex_stm32_h107.cfg \
44 -c "init" -c "reset init" \
45 -c "stm32f1x mass_erase 0" \
46 -c "flash write_image fancyblink.bin" \
50 The sigrok command line used was:
52 sigrok-cli -d 0:samplerate=4mhz --time 20s \
53 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' \
54 -o olimex_stm32-h103_flash_fancyblink.sr
57 olimex_stm32-h103_init_10s.sr
58 -----------------------------
60 The following OpenOCD command was used:
62 openocd -f interface/flossjtag-noeeprom.cfg -f board/olimex_stm32_h107.cfg \
65 The sigrok command line used was:
67 sigrok-cli -d 0:samplerate=4mhz --time 10s \
68 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' -o <filename>
71 olimex_stm32-h103_init_reset_init_10s.sr
72 ----------------------------------------
74 The following OpenOCD command was used:
76 openocd -f interface/flossjtag-noeeprom.cfg -f board/olimex_stm32_h107.cfg \
77 -c "init" -c "reset init"
79 The sigrok command line used was:
81 sigrok-cli -d 0:samplerate=4mhz --time 10s \
82 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' -o <filename>
85 Specific OpenOCD commands
86 -------------------------
88 For the following tests/files, OpenOCD was already running/connected, and the
89 following commands were entered via the OpenOCD telnet interface:
91 - olimex_stm32-h103_cmd_reg_10s.sr:
94 ===== arm v7m registers
95 (0) r0 (/32): 0x40011000
96 (1) r1 (/32): 0x00000000
97 (2) r2 (/32): 0x00000040
98 (3) r3 (/32): 0x000B5CF4
99 (4) r4 (/32): 0x40022000
100 (5) r5 (/32): 0xFFD7EFB4
101 (6) r6 (/32): 0x3A30084E
102 (7) r7 (/32): 0xF5309C2C
103 (8) r8 (/32): 0xFFFF55D4
104 (9) r9 (/32): 0xDFFFCFFD
105 (10) r10 (/32): 0xF9CAF759
106 (11) r11 (/32): 0xC7092295
107 (12) r12 (/32): 0x44444444
108 (13) sp (/32): 0x20000800
109 (14) lr (/32): 0xFFFFFFFF
110 (15) pc (/32): 0x080001A4
111 (16) xPSR (/32): 0x01000000
112 (17) msp (/32): 0x20000800
113 (18) psp (/32): 0x0748A880
114 (19) primask (/1): 0x00
115 (20) basepri (/8): 0x00
116 (21) faultmask (/1): 0x00
117 (22) control (/2): 0x00
118 ===== cortex-m3 dwt registers
120 (24) dwt_cyccnt (/32)
121 (25) dwt_0_comp (/32)
123 (27) dwt_0_function (/32)
124 (28) dwt_1_comp (/32)
126 (30) dwt_1_function (/32)
127 (31) dwt_2_comp (/32)
129 (33) dwt_2_function (/32)
130 (34) dwt_3_comp (/32)
132 (36) dwt_3_function (/32)
134 - olimex_stm32-h103_cmd_reset_10s.sr:
137 JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
138 JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
140 - olimex_stm32-h103_cmd_stm32f1x_options_read_0_10s.sr:
142 > stm32f1x options_read 0
143 device id = 0x20036410
144 flash size = 128kbytes
145 Option Byte: 0x3fffffc
146 Readout Protection Off
148 Stop: No reset generated
149 Standby: No reset generated
151 - olimex_stm32-h103_cmd_stm32f1x_mdw_10s.sr:
154 0x20000000: 02255100 044aa200 3b02f830 3b02f821 f01368e3 d0fb0f01 0f14f013 3a01d101
155 0x20000020: be00d1f0 40022000 20000800 080001a5 080001ef 080001ed 080001ed 080001ed