2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
31 #include "libsigrok.h"
32 #include "libsigrok-internal.h"
36 * This is a unified protocol driver for the DS1000 and DS2000 series.
38 * DS1000 support tested with a Rigol DS1102D.
40 * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
42 * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
43 * standard. If you want to read it - it costs real money...
45 * Every response from the scope has a linefeed appended because the
46 * standard says so. In principle this could be ignored because sending the
47 * next command clears the output queue of the scope. This driver tries to
48 * avoid doing that because it may cause an error being generated inside the
49 * scope and who knows what bugs the firmware has WRT this.
51 * Waveform data is transferred in a format called "arbitrary block program
52 * data" specified in IEEE 488.2. See Agilents programming manuals for their
53 * 2000/3000 series scopes for a nice description.
55 * Each data block from the scope has a header, e.g. "#900000001400".
56 * The '#' marks the start of a block.
57 * Next is one ASCII decimal digit between 1 and 9, this gives the number of
58 * ASCII decimal digits following.
59 * Last are the ASCII decimal digits giving the number of bytes (not
60 * samples!) in the block.
62 * After this header as many data bytes as indicated follow.
64 * Each data block has a trailing linefeed too.
67 static int parse_int(const char *str, int *ret)
73 tmp = strtol(str, &e, 10);
74 if (e == str || *e != '\0') {
75 sr_dbg("Failed to parse integer: '%s'", str);
79 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
82 if (tmp > INT_MAX || tmp < INT_MIN) {
83 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
91 /* Set the next event to wait for in rigol_ds_receive */
92 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
94 if (event == WAIT_STOP)
95 devc->wait_status = 2;
97 devc->wait_status = 1;
98 devc->wait_event = event;
102 * Waiting for a event will return a timeout after 2 to 3 seconds in order
103 * to not block the application.
105 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
108 struct dev_context *devc;
111 if (!(devc = sdi->priv))
117 * Trigger status may return:
118 * "TD" or "T'D" - triggered
119 * "AUTO" - autotriggered
121 * "WAIT" - waiting for trigger
125 if (devc->wait_status == 1) {
127 if (time(NULL) - start >= 3) {
128 sr_dbg("Timeout waiting for trigger");
129 return SR_ERR_TIMEOUT;
132 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
134 } while (buf[0] == status1 || buf[0] == status2);
136 devc->wait_status = 2;
138 if (devc->wait_status == 2) {
140 if (time(NULL) - start >= 3) {
141 sr_dbg("Timeout waiting for trigger");
142 return SR_ERR_TIMEOUT;
145 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
147 } while (buf[0] != status1 && buf[0] != status2);
149 rigol_ds_set_wait_event(devc, WAIT_NONE);
156 * For live capture we need to wait for a new trigger event to ensure that
157 * sample data is not returned twice.
159 * Unfortunately this will never really work because for sufficiently fast
160 * timebases and trigger rates it just can't catch the status changes.
162 * What would be needed is a trigger event register with autoreset like the
163 * Agilents have. The Rigols don't seem to have anything like this.
165 * The workaround is to only wait for the trigger when the timebase is slow
166 * enough. Of course this means that for faster timebases sample data can be
167 * returned multiple times, this effect is mitigated somewhat by sleeping
168 * for about one sweep time in that case.
170 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
172 struct dev_context *devc;
175 if (!(devc = sdi->priv))
179 * If timebase < 50 msecs/DIV just sleep about one sweep time except
180 * for really fast sweeps.
182 if (devc->timebase < 0.0499) {
183 if (devc->timebase > 0.99e-6) {
185 * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
186 * -> 85 percent of sweep time
188 s = (devc->timebase * devc->model->num_horizontal_divs
190 sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
193 rigol_ds_set_wait_event(devc, WAIT_NONE);
196 return rigol_ds_event_wait(sdi, 'T', 'A');
200 /* Wait for scope to got to "Stop" in single shot mode */
201 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
203 return rigol_ds_event_wait(sdi, 'S', 'S');
206 /* Check that a single shot acquisition actually succeeded on the DS2000 */
207 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
209 struct dev_context *devc;
210 struct sr_probe *probe;
213 if (!(devc = sdi->priv))
216 probe = devc->channel_entry->data;
218 if (devc->model->series <= RIGOL_DS1000)
221 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
222 probe->index + 1) != SR_OK)
224 /* Check that the number of samples will be accepted */
225 if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
227 if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
230 * If we get an "Execution error" the scope went from "Single" to
231 * "Stop" without actually triggering. There is no waveform
232 * displayed and trying to download one will fail - the scope thinks
233 * it has 1400 samples (like display memory) and the driver thinks
234 * it has a different number of samples.
236 * In that case just try to capture something again. Might still
237 * fail in interesting ways.
239 * Ain't firmware fun?
242 sr_warn("Single shot acquisition failed, retrying...");
243 /* Sleep a bit, otherwise the single shot will often fail */
245 rigol_ds_config_set(sdi, ":SING");
246 rigol_ds_set_wait_event(devc, WAIT_STOP);
253 /* Wait for enough data becoming available in scope output buffer */
254 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
257 struct dev_context *devc;
261 if (!(devc = sdi->priv))
267 if (time(NULL) - start >= 3) {
268 sr_dbg("Timeout waiting for data block");
269 return SR_ERR_TIMEOUT;
273 * The scope copies data really slowly from sample
274 * memory to its output buffer, so try not to bother
275 * it too much with SCPI requests but don't wait too
276 * long for short sample frame sizes.
278 g_usleep(devc->analog_frame_size < 15000 ? 100000 : 1000000);
280 /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
281 if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
284 if (parse_int(buf + 5, &len) != SR_OK)
286 } while (buf[0] == 'R' && len < 1000000);
288 rigol_ds_set_wait_event(devc, WAIT_NONE);
293 /* Send a configuration setting. */
294 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
296 struct dev_context *devc = sdi->priv;
300 va_start(args, format);
301 ret = sr_scpi_send_variadic(sdi->conn, format, args);
307 if (devc->model->series == RIGOL_DS1000) {
308 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
309 sr_spew("delay %dms", 100);
313 return sr_scpi_get_opc(sdi->conn);
317 /* Start capturing a new frameset */
318 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
320 struct dev_context *devc;
323 if (!(devc = sdi->priv))
326 sr_dbg("Starting data capture for frameset %lu of %lu",
327 devc->num_frames + 1, devc->limit_frames);
329 if (devc->model->series >= RIGOL_DS1000Z)
330 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
333 if (devc->data_source == DATA_SOURCE_LIVE) {
334 if (devc->model->series <= RIGOL_DS1000) {
335 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORM") != SR_OK)
338 if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
341 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
343 if (devc->model->series <= RIGOL_DS1000) {
344 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
346 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
348 if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
350 if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
352 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
355 if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
357 if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
360 rigol_ds_set_wait_event(devc, WAIT_STOP);
366 /* Start reading data from the current channel */
367 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
369 struct dev_context *devc;
370 struct sr_probe *probe;
372 if (!(devc = sdi->priv))
375 probe = devc->channel_entry->data;
377 sr_dbg("Starting reading data from channel %d", probe->index + 1);
379 if (devc->model->series < RIGOL_DS1000Z) {
380 if (probe->type == SR_PROBE_LOGIC) {
381 if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
384 if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
385 probe->index + 1) != SR_OK)
388 rigol_ds_set_wait_event(devc, WAIT_NONE);
390 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
391 probe->index + 1) != SR_OK)
393 if (devc->data_source != DATA_SOURCE_LIVE) {
394 if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
396 if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
398 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
400 rigol_ds_set_wait_event(devc, WAIT_NONE);
403 devc->num_channel_bytes = 0;
404 devc->num_block_bytes = 0;
409 /* Read the header of a data block */
410 static int rigol_ds_read_header(struct sr_scpi_dev_inst *scpi)
412 char start[3], length[10];
415 /* Read the hashsign and length digit. */
416 tmp = sr_scpi_read_data(scpi, start, 2);
419 sr_err("Failed to read first two bytes of data block header.");
422 if (start[0] != '#' || !isdigit(start[1]) || start[1] == '0') {
423 sr_err("Received invalid data block header start '%s'.", start);
426 len = atoi(start + 1);
428 /* Read the data length. */
429 tmp = sr_scpi_read_data(scpi, length, len);
432 sr_err("Failed to read %d bytes of data block length.", len);
435 if (parse_int(length, &len) != SR_OK) {
436 sr_err("Received invalid data block length '%s'.", length);
440 sr_dbg("Received data block header: %s%s -> block length %d", start, length, len);
445 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
447 struct sr_dev_inst *sdi;
448 struct sr_scpi_dev_inst *scpi;
449 struct dev_context *devc;
450 struct sr_datafeed_packet packet;
451 struct sr_datafeed_analog analog;
452 struct sr_datafeed_logic logic;
455 struct sr_probe *probe;
456 gsize expected_data_bytes;
460 if (!(sdi = cb_data))
463 if (!(devc = sdi->priv))
468 if (revents == G_IO_IN || revents == 0) {
469 switch(devc->wait_event) {
473 if (rigol_ds_trigger_wait(sdi) != SR_OK)
475 if (rigol_ds_channel_start(sdi) != SR_OK)
479 if (rigol_ds_block_wait(sdi) != SR_OK)
483 if (rigol_ds_stop_wait(sdi) != SR_OK)
485 if (rigol_ds_check_stop(sdi) != SR_OK)
487 if (rigol_ds_channel_start(sdi) != SR_OK)
491 sr_err("BUG: Unknown event target encountered");
494 probe = devc->channel_entry->data;
496 expected_data_bytes = probe->type == SR_PROBE_ANALOG ?
497 devc->analog_frame_size : devc->digital_frame_size;
499 if (devc->num_block_bytes == 0) {
500 if (devc->model->series >= RIGOL_DS1000Z)
501 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
504 if (sr_scpi_read_begin(scpi) != SR_OK)
507 if (devc->protocol == PROTOCOL_IEEE488_2) {
508 sr_dbg("New block header expected");
509 len = rigol_ds_read_header(scpi);
512 /* At slow timebases in live capture the DS2072
513 * sometimes returns "short" data blocks, with
514 * apparently no way to get the rest of the data.
515 * Discard these, the complete data block will
518 if (devc->data_source == DATA_SOURCE_LIVE
519 && (unsigned)len < expected_data_bytes) {
520 sr_dbg("Discarding short data block");
521 sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
524 devc->num_block_bytes = len;
526 devc->num_block_bytes = expected_data_bytes;
528 devc->num_block_read = 0;
531 len = devc->num_block_bytes - devc->num_block_read;
532 len = sr_scpi_read_data(scpi, (char *)devc->buffer,
533 len < ACQ_BUFFER_SIZE ? len : ACQ_BUFFER_SIZE);
535 sr_dbg("Received %d bytes.", len);
539 devc->num_block_read += len;
541 if (probe->type == SR_PROBE_ANALOG) {
542 vref = devc->vert_reference[probe->index];
543 vdiv = devc->vdiv[probe->index] / 25.6;
544 offset = devc->vert_offset[probe->index];
545 if (devc->model->series >= RIGOL_DS1000Z)
546 for (i = 0; i < len; i++)
547 devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
549 for (i = 0; i < len; i++)
550 devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
551 analog.probes = g_slist_append(NULL, probe);
552 analog.num_samples = len;
553 analog.data = devc->data;
554 analog.mq = SR_MQ_VOLTAGE;
555 analog.unit = SR_UNIT_VOLT;
557 packet.type = SR_DF_ANALOG;
558 packet.payload = &analog;
559 sr_session_send(cb_data, &packet);
560 g_slist_free(analog.probes);
564 logic.data = devc->buffer;
565 packet.type = SR_DF_LOGIC;
566 packet.payload = &logic;
567 sr_session_send(cb_data, &packet);
570 if (devc->num_block_read == devc->num_block_bytes) {
571 sr_dbg("Block has been completed");
572 if (devc->protocol == PROTOCOL_IEEE488_2) {
573 /* Discard the terminating linefeed */
574 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
575 /* Prepare for possible next block */
576 devc->num_block_bytes = 0;
577 if (devc->data_source != DATA_SOURCE_LIVE)
578 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
580 if (!sr_scpi_read_complete(scpi)) {
581 sr_err("Read should have been completed");
582 sdi->driver->dev_acquisition_stop(sdi, cb_data);
585 devc->num_block_read = 0;
587 sr_dbg("%d of %d block bytes read", devc->num_block_read, devc->num_block_bytes);
590 devc->num_channel_bytes += len;
592 if (devc->num_channel_bytes < expected_data_bytes)
593 /* Don't have the full data for this channel yet, re-run. */
596 /* End of data for this channel. */
597 if (devc->model->series >= RIGOL_DS1000Z) {
598 /* Signal end of data download to scope */
599 if (devc->data_source != DATA_SOURCE_LIVE)
601 * This causes a query error, without it switching
602 * to the next channel causes an error. Fun with
605 rigol_ds_config_set(sdi, ":WAV:END");
608 if (probe->type == SR_PROBE_ANALOG
609 && devc->channel_entry->next != NULL) {
610 /* We got the frame for this analog channel, but
611 * there's another analog channel. */
612 devc->channel_entry = devc->channel_entry->next;
613 rigol_ds_channel_start(sdi);
615 /* Done with all analog channels in this frame. */
616 if (devc->enabled_digital_probes
617 && devc->channel_entry != devc->enabled_digital_probes) {
618 /* Now we need to get the digital data. */
619 devc->channel_entry = devc->enabled_digital_probes;
620 rigol_ds_channel_start(sdi);
622 /* Done with this frame. */
623 packet.type = SR_DF_FRAME_END;
624 sr_session_send(cb_data, &packet);
626 if (++devc->num_frames == devc->limit_frames) {
627 /* Last frame, stop capture. */
628 sdi->driver->dev_acquisition_stop(sdi, cb_data);
630 /* Get the next frame, starting with the first analog channel. */
631 if (devc->enabled_analog_probes)
632 devc->channel_entry = devc->enabled_analog_probes;
634 devc->channel_entry = devc->enabled_digital_probes;
636 rigol_ds_capture_start(sdi);
638 /* Start of next frame. */
639 packet.type = SR_DF_FRAME_BEGIN;
640 sr_session_send(cb_data, &packet);
649 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
651 struct dev_context *devc;
658 /* Analog channel state. */
659 for (i = 0; i < devc->model->analog_channels; i++) {
660 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
661 res = sr_scpi_get_string(sdi->conn, cmd, &t_s);
665 devc->analog_channels[i] = !strcmp(t_s, "ON") || !strcmp(t_s, "1");
667 sr_dbg("Current analog channel state:");
668 for (i = 0; i < devc->model->analog_channels; i++)
669 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
671 /* Digital channel state. */
672 if (devc->model->has_digital) {
673 if (sr_scpi_get_string(sdi->conn, ":LA:DISP?", &t_s) != SR_OK)
675 devc->la_enabled = !strcmp(t_s, "ON") ? TRUE : FALSE;
676 sr_dbg("Logic analyzer %s, current digital channel state:",
677 devc->la_enabled ? "enabled" : "disabled");
678 for (i = 0; i < 16; i++) {
679 cmd = g_strdup_printf(":DIG%d:TURN?", i);
680 res = sr_scpi_get_string(sdi->conn, cmd, &t_s);
684 devc->digital_channels[i] = !strcmp(t_s, "ON") ? TRUE : FALSE;
686 sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
691 if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
693 sr_dbg("Current timebase %g", devc->timebase);
696 for (i = 0; i < devc->model->analog_channels; i++) {
697 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
698 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
703 sr_dbg("Current vertical gain:");
704 for (i = 0; i < devc->model->analog_channels; i++)
705 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
707 sr_dbg("Current vertical reference:");
708 if (devc->model->series >= RIGOL_DS1000Z) {
709 /* Vertical reference - not certain if this is the place to read it. */
710 for (i = 0; i < devc->model->analog_channels; i++) {
711 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", i + 1) != SR_OK)
713 if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?", &devc->vert_reference[i]) != SR_OK)
715 sr_dbg("CH%d %d", i + 1, devc->vert_reference[i]);
719 /* Vertical offset. */
720 for (i = 0; i < devc->model->analog_channels; i++) {
721 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
722 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
727 sr_dbg("Current vertical offset:");
728 for (i = 0; i < devc->model->analog_channels; i++)
729 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);
732 for (i = 0; i < devc->model->analog_channels; i++) {
733 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
734 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
739 sr_dbg("Current coupling:");
740 for (i = 0; i < devc->model->analog_channels; i++)
741 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
743 /* Trigger source. */
744 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
746 sr_dbg("Current trigger source %s", devc->trigger_source);
748 /* Horizontal trigger position. */
749 if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
751 sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
754 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
756 sr_dbg("Current trigger slope %s", devc->trigger_slope);