2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
27 #include "libsigrok.h"
28 #include "libsigrok-internal.h"
31 static const int32_t hwopts[] = {
36 static const int32_t hwcaps[] = {
39 SR_CONF_TRIGGER_SOURCE,
40 SR_CONF_TRIGGER_SLOPE,
41 SR_CONF_HORIZ_TRIGGERPOS,
47 static const int32_t analog_hwcaps[] = {
54 static const uint64_t timebases[][2] = {
93 /* { 1000, 1 }, Confuses other code? */
96 static const uint64_t vdivs[][2] = {
116 #define NUM_TIMEBASE ARRAY_SIZE(timebases)
117 #define NUM_VDIV ARRAY_SIZE(vdivs)
119 static const char *trigger_sources[] = {
144 static const char *coupling[] = {
150 /* Do not change the order of entries */
151 static const char *data_sources[] = {
158 * name, series, protocol flavor, min timebase, max timebase, min vdiv,
159 * digital channels, number of horizontal divs
162 #define RIGOL "Rigol Technologies"
163 #define AGILENT "Agilent Technologies"
165 static const struct rigol_ds_model supported_models[] = {
166 {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
167 {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
168 {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
169 {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
170 {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
171 {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
172 {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
173 {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
174 {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
175 {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
176 {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
177 {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
178 {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
179 {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
180 {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
181 {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
182 {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
183 {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
184 {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
185 {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
186 {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
187 {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
188 {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
189 {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
190 {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
191 {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
192 {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
193 {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
194 {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
195 {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
198 SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
199 static struct sr_dev_driver *di = &rigol_ds_driver_info;
201 static void clear_helper(void *priv)
203 struct dev_context *devc;
207 g_free(devc->buffer);
208 g_free(devc->coupling[0]);
209 g_free(devc->coupling[1]);
210 g_free(devc->trigger_source);
211 g_free(devc->trigger_slope);
212 g_slist_free(devc->analog_groups[0].probes);
213 g_slist_free(devc->analog_groups[1].probes);
214 g_slist_free(devc->digital_group.probes);
217 static int dev_clear(void)
219 return std_dev_clear(di, clear_helper);
222 static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
227 va_start(args, format);
228 ret = sr_scpi_send_variadic(sdi->conn, format, args);
234 return sr_scpi_get_opc(sdi->conn);
237 static int init(struct sr_context *sr_ctx)
239 return std_init(sr_ctx, di, LOG_PREFIX);
242 static int probe_port(const char *resource, const char *serialcomm, GSList **devices)
244 struct dev_context *devc;
245 struct sr_dev_inst *sdi;
246 struct sr_scpi_dev_inst *scpi;
247 struct sr_scpi_hw_info *hw_info;
248 struct sr_probe *probe;
250 const struct rigol_ds_model *model = NULL;
255 if (!(scpi = scpi_dev_inst_new(resource, serialcomm)))
258 if (sr_scpi_open(scpi) != SR_OK) {
259 sr_info("Couldn't open SCPI device.");
264 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
265 sr_info("Couldn't get IDN response.");
271 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
272 if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) &&
273 !strcmp(hw_info->model, supported_models[i].name)) {
274 model = &supported_models[i];
279 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
280 hw_info->manufacturer, hw_info->model,
281 hw_info->firmware_version))) {
282 sr_scpi_hw_info_free(hw_info);
288 sr_scpi_hw_info_free(hw_info);
294 sdi->inst_type = SR_INST_SCPI;
296 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
297 return SR_ERR_MALLOC;
299 devc->limit_frames = 0;
302 for (i = 0; i < model->analog_channels; i++) {
303 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
304 return SR_ERR_MALLOC;
305 probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name);
306 sdi->probes = g_slist_append(sdi->probes, probe);
307 devc->analog_groups[i].name = channel_name;
308 devc->analog_groups[i].probes = g_slist_append(NULL, probe);
309 sdi->probe_groups = g_slist_append(sdi->probe_groups,
310 &devc->analog_groups[i]);
313 if (devc->model->has_digital) {
314 for (i = 0; i < 16; i++) {
315 if (!(channel_name = g_strdup_printf("D%d", i)))
316 return SR_ERR_MALLOC;
317 probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE, channel_name);
318 g_free(channel_name);
320 return SR_ERR_MALLOC;
321 sdi->probes = g_slist_append(sdi->probes, probe);
322 devc->digital_group.probes = g_slist_append(
323 devc->digital_group.probes, probe);
325 devc->digital_group.name = "LA";
326 sdi->probe_groups = g_slist_append(sdi->probe_groups,
327 &devc->digital_group);
330 for (i = 0; i < NUM_TIMEBASE; i++) {
331 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
332 devc->timebases = &timebases[i];
333 if (!memcmp(&devc->model->max_timebase, &timebases[i], sizeof(uint64_t[2])))
334 devc->num_timebases = &timebases[i] - devc->timebases + 1;
337 for (i = 0; i < NUM_VDIV; i++)
338 if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
339 devc->vdivs = &vdivs[i];
341 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
342 return SR_ERR_MALLOC;
343 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
344 return SR_ERR_MALLOC;
346 devc->data_source = DATA_SOURCE_LIVE;
350 *devices = g_slist_append(NULL, sdi);
355 static GSList *scan(GSList *options)
357 struct drv_context *drvc;
358 struct sr_config *src;
362 const gchar *dev_name;
364 gchar *serialcomm = NULL;
368 for (l = options; l; l = l->next) {
372 port = (char *)g_variant_get_string(src->data, NULL);
374 case SR_CONF_SERIALCOMM:
375 serialcomm = (char *)g_variant_get_string(src->data, NULL);
382 if (probe_port(port, serialcomm, &devices) == SR_ERR_MALLOC) {
389 if (!(dir = g_dir_open("/sys/class/usbmisc/", 0, NULL)))
390 if (!(dir = g_dir_open("/sys/class/usb/", 0, NULL)))
392 while ((dev_name = g_dir_read_name(dir))) {
393 if (strncmp(dev_name, "usbtmc", 6))
395 port = g_strconcat("/dev/", dev_name, NULL);
396 ret = probe_port(port, serialcomm, &devices);
400 if (ret == SR_ERR_MALLOC) {
408 /* Tack a copy of the newly found devices onto the driver list. */
409 l = g_slist_copy(devices);
410 drvc->instances = g_slist_concat(drvc->instances, l);
415 static GSList *dev_list(void)
417 return ((struct drv_context *)(di->priv))->instances;
420 static int dev_open(struct sr_dev_inst *sdi)
422 struct sr_scpi_dev_inst *scpi = sdi->conn;
424 if (sr_scpi_open(scpi) < 0)
427 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
430 sdi->status = SR_ST_ACTIVE;
435 static int dev_close(struct sr_dev_inst *sdi)
437 struct sr_scpi_dev_inst *scpi;
442 if (sr_scpi_close(scpi) < 0)
444 sdi->status = SR_ST_INACTIVE;
450 static int cleanup(void)
455 static int analog_frame_size(const struct sr_dev_inst *sdi)
457 struct dev_context *devc = sdi->priv;
458 struct sr_probe *probe;
459 int analog_probes = 0;
462 switch (devc->model->series) {
464 return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
466 return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
468 for (l = sdi->probes; l; l = l->next) {
470 if (probe->type == SR_PROBE_ANALOG && probe->enabled)
473 if (devc->data_source == DATA_SOURCE_MEMORY) {
474 if (analog_probes == 1)
475 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C;
477 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C;
479 if (devc->model->series == AGILENT_DSO1000)
480 return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE;
482 return DS2000_ANALOG_LIVE_WAVEFORM_SIZE;
487 static int digital_frame_size(const struct sr_dev_inst *sdi)
489 struct dev_context *devc = sdi->priv;
491 switch (devc->model->series) {
493 return VS5000_DIGITAL_WAVEFORM_SIZE;
495 return DS1000_DIGITAL_WAVEFORM_SIZE;
501 static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
502 const struct sr_probe_group *probe_group)
504 struct dev_context *devc;
507 if (!sdi || !(devc = sdi->priv))
510 /* If a probe group is specified, it must be a valid one. */
511 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
512 sr_err("Invalid probe group specified.");
517 case SR_CONF_NUM_TIMEBASE:
518 *data = g_variant_new_int32(devc->model->num_horizontal_divs);
520 case SR_CONF_NUM_VDIV:
521 *data = g_variant_new_int32(8);
522 case SR_CONF_DATA_SOURCE:
523 if (devc->data_source == DATA_SOURCE_LIVE)
524 *data = g_variant_new_string("Live");
525 else if (devc->data_source == DATA_SOURCE_MEMORY)
526 *data = g_variant_new_string("Memory");
528 *data = g_variant_new_string("Segmented");
530 case SR_CONF_SAMPLERATE:
531 if (devc->data_source == DATA_SOURCE_LIVE) {
532 samplerate = analog_frame_size(sdi) /
533 (devc->timebase * devc->model->num_horizontal_divs);
534 *data = g_variant_new_uint64(samplerate);
546 static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
547 const struct sr_probe_group *probe_group)
549 struct dev_context *devc;
550 uint64_t tmp_u64, p, q;
557 if (!(devc = sdi->priv))
560 if (sdi->status != SR_ST_ACTIVE)
561 return SR_ERR_DEV_CLOSED;
563 /* If a probe group is specified, it must be a valid one. */
564 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
565 sr_err("Invalid probe group specified.");
571 case SR_CONF_LIMIT_FRAMES:
572 devc->limit_frames = g_variant_get_uint64(data);
574 case SR_CONF_TRIGGER_SLOPE:
575 tmp_u64 = g_variant_get_uint64(data);
576 if (tmp_u64 != 0 && tmp_u64 != 1)
578 g_free(devc->trigger_slope);
579 devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
580 ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
582 case SR_CONF_HORIZ_TRIGGERPOS:
583 t_dbl = g_variant_get_double(data);
584 if (t_dbl < 0.0 || t_dbl > 1.0)
586 devc->horiz_triggerpos = t_dbl;
587 /* We have the trigger offset as a percentage of the frame, but
588 * need to express this in seconds. */
589 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
590 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
591 ret = set_cfg(sdi, ":TIM:OFFS %s", buffer);
593 case SR_CONF_TIMEBASE:
594 g_variant_get(data, "(tt)", &p, &q);
595 for (i = 0; i < devc->num_timebases; i++) {
596 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
597 devc->timebase = (float)p / q;
598 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
600 ret = set_cfg(sdi, ":TIM:SCAL %s", buffer);
604 if (i == devc->num_timebases)
607 case SR_CONF_TRIGGER_SOURCE:
608 tmp_str = g_variant_get_string(data, NULL);
609 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
610 if (!strcmp(trigger_sources[i], tmp_str)) {
611 g_free(devc->trigger_source);
612 devc->trigger_source = g_strdup(trigger_sources[i]);
613 if (!strcmp(devc->trigger_source, "AC Line"))
615 else if (!strcmp(devc->trigger_source, "CH1"))
617 else if (!strcmp(devc->trigger_source, "CH2"))
619 else if (!strcmp(devc->trigger_source, "CH3"))
621 else if (!strcmp(devc->trigger_source, "CH4"))
624 tmp_str = (char *)devc->trigger_source;
625 ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
629 if (i == ARRAY_SIZE(trigger_sources))
634 sr_err("No probe group specified.");
635 return SR_ERR_PROBE_GROUP;
637 g_variant_get(data, "(tt)", &p, &q);
638 for (i = 0; i < 2; i++) {
639 if (probe_group == &devc->analog_groups[i]) {
640 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
641 if (vdivs[j][0] != p || vdivs[j][1] != q)
643 devc->vdiv[i] = (float)p / q;
644 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
646 return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1,
653 case SR_CONF_COUPLING:
655 sr_err("No probe group specified.");
656 return SR_ERR_PROBE_GROUP;
658 tmp_str = g_variant_get_string(data, NULL);
659 for (i = 0; i < 2; i++) {
660 if (probe_group == &devc->analog_groups[i]) {
661 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
662 if (!strcmp(tmp_str, coupling[j])) {
663 g_free(devc->coupling[i]);
664 devc->coupling[i] = g_strdup(coupling[j]);
665 return set_cfg(sdi, ":CHAN%d:COUP %s", i + 1,
673 case SR_CONF_DATA_SOURCE:
674 tmp_str = g_variant_get_string(data, NULL);
675 if (!strcmp(tmp_str, "Live"))
676 devc->data_source = DATA_SOURCE_LIVE;
677 else if (!strcmp(tmp_str, "Memory"))
678 devc->data_source = DATA_SOURCE_MEMORY;
679 else if (devc->model->series >= RIGOL_DS1000Z
680 && !strcmp(tmp_str, "Segmented"))
681 devc->data_source = DATA_SOURCE_SEGMENTED;
693 static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
694 const struct sr_probe_group *probe_group)
696 GVariant *tuple, *rational[2];
699 struct dev_context *devc = NULL;
704 if (key == SR_CONF_SCAN_OPTIONS) {
705 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
706 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
708 } else if (key == SR_CONF_DEVICE_OPTIONS && probe_group == NULL) {
709 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
710 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
714 /* Every other option requires a valid device instance. */
715 if (!sdi || !(devc = sdi->priv))
718 /* If a probe group is specified, it must be a valid one. */
720 if (probe_group != &devc->analog_groups[0]
721 && probe_group != &devc->analog_groups[1]) {
722 sr_err("Invalid probe group specified.");
728 case SR_CONF_DEVICE_OPTIONS:
730 sr_err("No probe group specified.");
731 return SR_ERR_PROBE_GROUP;
733 if (probe_group == &devc->digital_group) {
734 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
735 NULL, 0, sizeof(int32_t));
738 for (i = 0; i < 2; i++) {
739 if (probe_group == &devc->analog_groups[i]) {
740 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
741 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
748 case SR_CONF_COUPLING:
750 sr_err("No probe group specified.");
751 return SR_ERR_PROBE_GROUP;
753 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
757 /* Can't know this until we have the exact model. */
760 sr_err("No probe group specified.");
761 return SR_ERR_PROBE_GROUP;
763 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
764 for (i = 0; i < NUM_VDIV; i++) {
765 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
766 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
767 tuple = g_variant_new_tuple(rational, 2);
768 g_variant_builder_add_value(&gvb, tuple);
770 *data = g_variant_builder_end(&gvb);
772 case SR_CONF_TIMEBASE:
774 /* Can't know this until we have the exact model. */
776 if (devc->num_timebases <= 0)
778 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
779 for (i = 0; i < devc->num_timebases; i++) {
780 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
781 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
782 tuple = g_variant_new_tuple(rational, 2);
783 g_variant_builder_add_value(&gvb, tuple);
785 *data = g_variant_builder_end(&gvb);
787 case SR_CONF_TRIGGER_SOURCE:
789 /* Can't know this until we have the exact model. */
791 *data = g_variant_new_strv(trigger_sources,
792 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
794 case SR_CONF_DATA_SOURCE:
796 /* Can't know this until we have the exact model. */
798 /* This needs tweaking by series/model! */
799 if (devc->model->series == RIGOL_DS2000)
800 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
802 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
811 static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
813 struct sr_scpi_dev_inst *scpi;
814 struct dev_context *devc;
815 struct sr_probe *probe;
816 struct sr_datafeed_packet packet;
819 if (sdi->status != SR_ST_ACTIVE)
820 return SR_ERR_DEV_CLOSED;
825 devc->num_frames = 0;
827 for (l = sdi->probes; l; l = l->next) {
829 sr_dbg("handling probe %s", probe->name);
830 if (probe->type == SR_PROBE_ANALOG) {
832 devc->enabled_analog_probes = g_slist_append(
833 devc->enabled_analog_probes, probe);
834 if (probe->enabled != devc->analog_channels[probe->index]) {
835 /* Enabled channel is currently disabled, or vice versa. */
836 if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
837 probe->enabled ? "ON" : "OFF") != SR_OK)
839 devc->analog_channels[probe->index] = probe->enabled;
841 } else if (probe->type == SR_PROBE_LOGIC) {
842 if (probe->enabled) {
843 devc->enabled_digital_probes = g_slist_append(
844 devc->enabled_digital_probes, probe);
845 /* Turn on LA module if currently off. */
846 if (!devc->la_enabled) {
847 if (set_cfg(sdi, ":LA:DISP ON") != SR_OK)
849 devc->la_enabled = TRUE;
852 if (probe->enabled != devc->digital_channels[probe->index]) {
853 /* Enabled channel is currently disabled, or vice versa. */
854 if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
855 probe->enabled ? "ON" : "OFF") != SR_OK)
857 devc->digital_channels[probe->index] = probe->enabled;
862 if (!devc->enabled_analog_probes && !devc->enabled_digital_probes)
865 /* Turn off LA module if on and no digital probes selected. */
866 if (devc->la_enabled && !devc->enabled_digital_probes)
867 if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK)
870 if (devc->data_source == DATA_SOURCE_LIVE) {
871 if (set_cfg(sdi, ":RUN") != SR_OK)
873 } else if (devc->data_source == DATA_SOURCE_MEMORY) {
874 if (devc->model->series != RIGOL_DS2000) {
875 sr_err("Data source 'Memory' not supported for this device");
878 } else if (devc->data_source == DATA_SOURCE_SEGMENTED) {
879 sr_err("Data source 'Segmented' not yet supported");
883 sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
885 /* Send header packet to the session bus. */
886 std_session_send_df_header(cb_data, LOG_PREFIX);
888 if (devc->enabled_analog_probes)
889 devc->channel_entry = devc->enabled_analog_probes;
891 devc->channel_entry = devc->enabled_digital_probes;
893 devc->analog_frame_size = analog_frame_size(sdi);
894 devc->digital_frame_size = digital_frame_size(sdi);
896 if (devc->model->series < RIGOL_DS1000Z) {
897 /* Fetch the first frame. */
898 if (rigol_ds_channel_start(sdi) != SR_OK)
901 if (devc->enabled_analog_probes) {
902 if (devc->data_source == DATA_SOURCE_MEMORY) {
903 /* Apparently for the DS2000 the memory
904 * depth can only be set in Running state -
905 * this matches the behaviour of the UI. */
906 if (set_cfg(sdi, ":RUN") != SR_OK)
908 if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
910 if (set_cfg(sdi, ":STOP") != SR_OK)
913 if (rigol_ds_capture_start(sdi) != SR_OK)
918 /* Start of first frame. */
919 packet.type = SR_DF_FRAME_BEGIN;
920 sr_session_send(cb_data, &packet);
925 static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
927 struct dev_context *devc;
928 struct sr_scpi_dev_inst *scpi;
929 struct sr_datafeed_packet packet;
935 if (sdi->status != SR_ST_ACTIVE) {
936 sr_err("Device inactive, can't stop acquisition.");
940 /* End of last frame. */
941 packet.type = SR_DF_END;
942 sr_session_send(sdi, &packet);
944 g_slist_free(devc->enabled_analog_probes);
945 g_slist_free(devc->enabled_digital_probes);
946 devc->enabled_analog_probes = NULL;
947 devc->enabled_digital_probes = NULL;
949 sr_scpi_source_remove(scpi);
954 SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
956 .longname = "Rigol DS",
961 .dev_list = dev_list,
962 .dev_clear = dev_clear,
963 .config_get = config_get,
964 .config_set = config_set,
965 .config_list = config_list,
966 .dev_open = dev_open,
967 .dev_close = dev_close,
968 .dev_acquisition_start = dev_acquisition_start,
969 .dev_acquisition_stop = dev_acquisition_stop,