2 * This file is part of the sigrok project.
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <sys/types.h>
38 #include <arpa/inet.h>
41 #include "libsigrok.h"
42 #include "libsigrok-internal.h"
46 #define O_NONBLOCK FIONBIO
49 static const int hwcaps[] = {
50 SR_HWCAP_LOGIC_ANALYZER,
52 SR_HWCAP_CAPTURE_RATIO,
53 SR_HWCAP_LIMIT_SAMPLES,
58 /* Probes are numbered 0-31 (on the PCB silkscreen). */
59 static const char *probe_names[NUM_PROBES + 1] = {
95 /* default supported samplerates, can be overridden by device metadata */
96 static const struct sr_samplerates samplerates = {
103 SR_PRIV struct sr_dev_driver ols_driver_info;
104 static struct sr_dev_driver *odi = &ols_driver_info;
106 static int send_shortcommand(int fd, uint8_t command)
110 sr_dbg("ols: sending cmd 0x%.2x", command);
112 if (serial_write(fd, buf, 1) != 1)
118 static int send_longcommand(int fd, uint8_t command, uint32_t data)
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(fd, buf, 5) != 5)
134 static int configure_probes(const struct sr_dev_inst *sdi)
136 struct dev_context *devc;
137 const struct sr_probe *probe;
139 int probe_bit, stage, i;
144 devc->probe_mask = 0;
145 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
146 devc->trigger_mask[i] = 0;
147 devc->trigger_value[i] = 0;
150 devc->num_stages = 0;
151 for (l = sdi->probes; l; l = l->next) {
152 probe = (const struct sr_probe *)l->data;
157 * Set up the probe mask for later configuration into the
160 probe_bit = 1 << (probe->index);
161 devc->probe_mask |= probe_bit;
166 /* Configure trigger mask and value. */
168 for (tc = probe->trigger; tc && *tc; tc++) {
169 devc->trigger_mask[stage] |= probe_bit;
171 devc->trigger_value[stage] |= probe_bit;
175 * TODO: Only supporting parallel mode, with
180 if (stage > devc->num_stages)
181 devc->num_stages = stage;
187 static uint32_t reverse16(uint32_t in)
191 out = (in & 0xff) << 8;
192 out |= (in & 0xff00) >> 8;
193 out |= (in & 0xff0000) << 8;
194 out |= (in & 0xff000000) >> 8;
199 static uint32_t reverse32(uint32_t in)
203 out = (in & 0xff) << 24;
204 out |= (in & 0xff00) << 8;
205 out |= (in & 0xff0000) >> 8;
206 out |= (in & 0xff000000) >> 24;
211 static struct dev_context *ols_dev_new(void)
213 struct dev_context *devc;
215 /* TODO: Is 'devc' ever g_free()'d? */
216 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
217 sr_err("ols: %s: devc malloc failed", __func__);
221 devc->trigger_at = -1;
222 devc->probe_mask = 0xffffffff;
223 devc->cur_samplerate = SR_KHZ(200);
229 static struct sr_dev_inst *get_metadata(int fd)
231 struct sr_dev_inst *sdi;
232 struct dev_context *devc;
233 struct sr_probe *probe;
234 uint32_t tmp_int, ui;
235 uint8_t key, type, token;
236 GString *tmp_str, *devname, *version;
239 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
241 devc = ols_dev_new();
244 devname = g_string_new("");
245 version = g_string_new("");
249 if (serial_read(fd, &key, 1) != 1 || key == 0x00)
255 /* NULL-terminated string */
256 tmp_str = g_string_new("");
257 while (serial_read(fd, &tmp_c, 1) == 1 && tmp_c != '\0')
258 g_string_append_c(tmp_str, tmp_c);
259 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
264 devname = g_string_append(devname, tmp_str->str);
267 /* FPGA firmware version */
269 g_string_append(version, ", ");
270 g_string_append(version, "FPGA version ");
271 g_string_append(version, tmp_str->str);
274 /* Ancillary version */
276 g_string_append(version, ", ");
277 g_string_append(version, "Ancillary version ");
278 g_string_append(version, tmp_str->str);
281 sr_info("ols: unknown token 0x%.2x: '%s'",
282 token, tmp_str->str);
285 g_string_free(tmp_str, TRUE);
288 /* 32-bit unsigned integer */
289 if (serial_read(fd, &tmp_int, 4) != 4)
291 tmp_int = reverse32(tmp_int);
292 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
296 /* Number of usable probes */
297 for (ui = 0; ui < tmp_int; ui++) {
298 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
301 sdi->probes = g_slist_append(sdi->probes, probe);
305 /* Amount of sample memory available (bytes) */
306 devc->max_samples = tmp_int;
309 /* Amount of dynamic memory available (bytes) */
310 /* what is this for? */
313 /* Maximum sample rate (hz) */
314 devc->max_samplerate = tmp_int;
317 /* protocol version */
318 devc->protocol_version = tmp_int;
321 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
327 /* 8-bit unsigned integer */
328 if (serial_read(fd, &tmp_c, 1) != 1)
330 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
334 /* Number of usable probes */
335 for (ui = 0; ui < tmp_c; ui++) {
336 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
339 sdi->probes = g_slist_append(sdi->probes, probe);
343 /* protocol version */
344 devc->protocol_version = tmp_c;
347 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
358 sdi->model = devname->str;
359 sdi->version = version->str;
360 g_string_free(devname, FALSE);
361 g_string_free(version, FALSE);
366 static int hw_init(void)
368 struct drv_context *drvc;
370 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
371 sr_err("ols: driver context malloc failed.");
372 return SR_ERR_MALLOC;
379 static GSList *hw_scan(GSList *options)
381 struct sr_hwopt *opt;
383 const char *conn, *serialcomm;
384 struct sr_dev_inst *sdi;
385 struct drv_context *drvc;
386 struct dev_context *devc;
387 struct sr_probe *probe;
389 int final_devcnt, fd, ret, i;
397 conn = serialcomm = NULL;
398 for (l = options; l; l = l->next) {
400 switch (opt->hwopt) {
404 case SR_HWOPT_SERIALCOMM:
405 serialcomm = opt->value;
410 sr_err("ols: No serial port specified.");
414 if (serialcomm == NULL) {
415 serialcomm = g_strdup("115200/8n1");
418 /* The discovery procedure is like this: first send the Reset
419 * command (0x00) 5 times, since the device could be anywhere
420 * in a 5-byte command. Then send the ID command (0x02).
421 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
424 * Since it may take the device a while to respond at 115Kb/s,
425 * we do all the sending first, then wait for all of them to
426 * respond with g_poll().
428 sr_info("ols: probing %s .", conn);
429 fd = serial_open(conn, O_RDWR | O_NONBLOCK);
431 sr_err("ols: could not open port %s .", conn);
435 serial_set_paramstr(fd, serialcomm);
437 for (i = 0; i < 5; i++) {
438 if ((ret = send_shortcommand(fd, CMD_RESET)) != SR_OK) {
439 /* Serial port is not writable. */
440 sr_err("ols: port %s is not writable.", conn);
445 sr_err("ols: Could not use port %s. Quitting.", conn);
448 send_shortcommand(fd, CMD_ID);
450 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
453 g_poll(&probefd/*fds*/, 1/*devcnt*/, 1);
455 if (probefd.revents != G_IO_IN)
457 if (serial_read(probefd.fd, buf, 4) != 4)
459 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
462 /* definitely using the OLS protocol, check if it supports
463 * the metadata command
465 send_shortcommand(probefd.fd, CMD_METADATA);
467 probefd.events = G_IO_IN;
468 if (g_poll(&probefd, 1, 10) > 0) {
470 sdi = get_metadata(fd);
471 sdi->index = final_devcnt;
474 /* not an OLS -- some other board that uses the sump protocol */
475 sdi = sr_dev_inst_new(final_devcnt, SR_ST_INACTIVE,
476 "Sump", "Logic Analyzer", "v1.0");
478 devc = ols_dev_new();
479 for (i = 0; i < 32; i++) {
480 if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
483 sdi->probes = g_slist_append(sdi->probes, probe);
487 devc->serial = sr_serial_dev_inst_new("FIXME", -1);
488 drvc->instances = g_slist_append(drvc->instances, sdi);
489 devices = g_slist_append(devices, sdi);
492 serial_close(probefd.fd);
494 /* clean up after all the probing */
502 static GSList *hw_dev_list(void)
504 struct drv_context *drvc;
508 return drvc->instances;
511 static int hw_dev_open(struct sr_dev_inst *sdi)
513 struct dev_context *devc;
517 devc->serial->fd = serial_open(devc->serial->port, O_RDWR);
518 if (devc->serial->fd == -1)
521 sdi->status = SR_ST_ACTIVE;
526 static int hw_dev_close(struct sr_dev_inst *sdi)
528 struct dev_context *devc;
532 if (devc->serial->fd != -1) {
533 serial_close(devc->serial->fd);
534 devc->serial->fd = -1;
535 sdi->status = SR_ST_INACTIVE;
541 static int hw_cleanup(void)
544 struct sr_dev_inst *sdi;
545 struct drv_context *drvc;
546 struct dev_context *devc;
549 if (!(drvc = odi->priv))
552 /* Properly close and free all devices. */
553 for (l = drvc->instances; l; l = l->next) {
554 if (!(sdi = l->data)) {
555 /* Log error, but continue cleaning up the rest. */
556 sr_err("ols: %s: sdi was NULL, continuing", __func__);
560 if (!(devc = sdi->priv)) {
561 /* Log error, but continue cleaning up the rest. */
562 sr_err("ols: %s: sdi->priv was NULL, continuing",
567 /* TODO: Check for serial != NULL. */
568 if (devc->serial->fd != -1)
569 serial_close(devc->serial->fd);
570 sr_serial_dev_inst_free(devc->serial);
571 sr_dev_inst_free(sdi);
573 g_slist_free(drvc->instances);
574 drvc->instances = NULL;
579 static int hw_info_get(int info_id, const void **data,
580 const struct sr_dev_inst *sdi)
582 struct dev_context *devc;
588 case SR_DI_NUM_PROBES:
589 *data = GINT_TO_POINTER(1);
591 case SR_DI_PROBE_NAMES:
594 case SR_DI_SAMPLERATES:
595 *data = &samplerates;
597 case SR_DI_TRIGGER_TYPES:
598 *data = (char *)TRIGGER_TYPES;
600 case SR_DI_CUR_SAMPLERATE:
603 *data = &devc->cur_samplerate;
614 static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
616 struct dev_context *devc;
619 if (devc->max_samplerate) {
620 if (samplerate > devc->max_samplerate)
621 return SR_ERR_SAMPLERATE;
622 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
623 return SR_ERR_SAMPLERATE;
625 if (samplerate > CLOCK_RATE) {
626 devc->flag_reg |= FLAG_DEMUX;
627 devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
629 devc->flag_reg &= ~FLAG_DEMUX;
630 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
633 /* Calculate actual samplerate used and complain if it is different
634 * from the requested.
636 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
637 if (devc->flag_reg & FLAG_DEMUX)
638 devc->cur_samplerate *= 2;
639 if (devc->cur_samplerate != samplerate)
640 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
641 PRIu64, samplerate, devc->cur_samplerate);
646 static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
649 struct dev_context *devc;
651 const uint64_t *tmp_u64;
655 if (sdi->status != SR_ST_ACTIVE)
659 case SR_HWCAP_SAMPLERATE:
660 ret = set_samplerate(sdi, *(const uint64_t *)value);
662 case SR_HWCAP_LIMIT_SAMPLES:
664 if (*tmp_u64 < MIN_NUM_SAMPLES)
666 if (*tmp_u64 > devc->max_samples)
667 sr_err("ols: sample limit exceeds hw max");
668 devc->limit_samples = *tmp_u64;
669 sr_info("ols: sample limit %" PRIu64, devc->limit_samples);
672 case SR_HWCAP_CAPTURE_RATIO:
673 devc->capture_ratio = *(const uint64_t *)value;
674 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
675 devc->capture_ratio = 0;
681 if (GPOINTER_TO_INT(value)) {
682 sr_info("ols: enabling RLE");
683 devc->flag_reg |= FLAG_RLE;
694 static void abort_acquisition(const struct sr_dev_inst *sdi)
696 struct sr_datafeed_packet packet;
697 struct dev_context *devc;
700 sr_source_remove(devc->serial->fd);
702 /* Terminate session */
703 packet.type = SR_DF_END;
704 sr_session_send(sdi, &packet);
710 static int receive_data(int fd, int revents, void *cb_data)
712 struct sr_datafeed_packet packet;
713 struct sr_datafeed_logic logic;
714 struct sr_dev_inst *sdi;
715 struct drv_context *drvc;
716 struct dev_context *devc;
718 int num_channels, offset, i, j;
723 /* Find this device's devc struct by its fd. */
725 for (l = drvc->instances; l; l = l->next) {
728 if (devc->serial->fd == fd) {
734 /* Shouldn't happen. */
737 if (devc->num_transfers++ == 0) {
739 * First time round, means the device started sending data,
740 * and will not stop until done. If it stops sending for
741 * longer than it takes to send a byte, that means it's
742 * finished. We'll double that to 30ms to be sure...
744 sr_source_remove(fd);
745 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
746 /* TODO: Check malloc return code. */
747 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
748 if (!devc->raw_sample_buf) {
749 sr_err("ols: %s: devc->raw_sample_buf malloc failed",
753 /* fill with 1010... for debugging */
754 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
758 for (i = 0x20; i > 0x02; i /= 2) {
759 if ((devc->flag_reg & i) == 0)
763 if (revents == G_IO_IN) {
764 if (serial_read(fd, &byte, 1) != 1)
767 /* Ignore it if we've read enough. */
768 if (devc->num_samples >= devc->limit_samples)
771 devc->sample[devc->num_bytes++] = byte;
772 sr_dbg("ols: received byte 0x%.2x", byte);
773 if (devc->num_bytes == num_channels) {
774 /* Got a full sample. */
775 sr_dbg("ols: received sample 0x%.*x",
776 devc->num_bytes * 2, *(int *)devc->sample);
777 if (devc->flag_reg & FLAG_RLE) {
779 * In RLE mode -1 should never come in as a
780 * sample, because bit 31 is the "count" flag.
782 if (devc->sample[devc->num_bytes - 1] & 0x80) {
783 devc->sample[devc->num_bytes - 1] &= 0x7f;
785 * FIXME: This will only work on
786 * little-endian systems.
788 devc->rle_count = *(int *)(devc->sample);
789 sr_dbg("ols: RLE count = %d", devc->rle_count);
794 devc->num_samples += devc->rle_count + 1;
795 if (devc->num_samples > devc->limit_samples) {
796 /* Save us from overrunning the buffer. */
797 devc->rle_count -= devc->num_samples - devc->limit_samples;
798 devc->num_samples = devc->limit_samples;
801 if (num_channels < 4) {
803 * Some channel groups may have been turned
804 * off, to speed up transfer between the
805 * hardware and the PC. Expand that here before
806 * submitting it over the session bus --
807 * whatever is listening on the bus will be
808 * expecting a full 32-bit sample, based on
809 * the number of probes.
812 memset(devc->tmp_sample, 0, 4);
813 for (i = 0; i < 4; i++) {
814 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
816 * This channel group was
817 * enabled, copy from received
820 devc->tmp_sample[i] = devc->sample[j++];
823 memcpy(devc->sample, devc->tmp_sample, 4);
824 sr_dbg("ols: full sample 0x%.8x", *(int *)devc->sample);
827 /* the OLS sends its sample buffer backwards.
828 * store it in reverse order here, so we can dump
829 * this on the session bus later.
831 offset = (devc->limit_samples - devc->num_samples) * 4;
832 for (i = 0; i <= devc->rle_count; i++) {
833 memcpy(devc->raw_sample_buf + offset + (i * 4),
836 memset(devc->sample, 0, 4);
842 * This is the main loop telling us a timeout was reached, or
843 * we've acquired all the samples we asked for -- we're done.
844 * Send the (properly-ordered) buffer to the frontend.
846 if (devc->trigger_at != -1) {
847 /* a trigger was set up, so we need to tell the frontend
850 if (devc->trigger_at > 0) {
851 /* there are pre-trigger samples, send those first */
852 packet.type = SR_DF_LOGIC;
853 packet.payload = &logic;
854 logic.length = devc->trigger_at * 4;
856 logic.data = devc->raw_sample_buf +
857 (devc->limit_samples - devc->num_samples) * 4;
858 sr_session_send(cb_data, &packet);
861 /* send the trigger */
862 packet.type = SR_DF_TRIGGER;
863 sr_session_send(cb_data, &packet);
865 /* send post-trigger samples */
866 packet.type = SR_DF_LOGIC;
867 packet.payload = &logic;
868 logic.length = (devc->num_samples * 4) - (devc->trigger_at * 4);
870 logic.data = devc->raw_sample_buf + devc->trigger_at * 4 +
871 (devc->limit_samples - devc->num_samples) * 4;
872 sr_session_send(cb_data, &packet);
874 /* no trigger was used */
875 packet.type = SR_DF_LOGIC;
876 packet.payload = &logic;
877 logic.length = devc->num_samples * 4;
879 logic.data = devc->raw_sample_buf +
880 (devc->limit_samples - devc->num_samples) * 4;
881 sr_session_send(cb_data, &packet);
883 g_free(devc->raw_sample_buf);
888 abort_acquisition(sdi);
894 static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
897 struct sr_datafeed_packet *packet;
898 struct sr_datafeed_header *header;
899 struct sr_datafeed_meta_logic meta;
900 struct dev_context *devc;
901 uint32_t trigger_config[4];
903 uint16_t readcount, delaycount;
904 uint8_t changrp_mask;
910 if (sdi->status != SR_ST_ACTIVE)
913 if (configure_probes(sdi) != SR_OK) {
914 sr_err("ols: failed to configured probes");
919 * Enable/disable channel groups in the flag register according to the
920 * probe mask. Calculate this here, because num_channels is needed
921 * to limit readcount.
925 for (i = 0; i < 4; i++) {
926 if (devc->probe_mask & (0xff << (i * 8))) {
927 changrp_mask |= (1 << i);
933 * Limit readcount to prevent reading past the end of the hardware
936 readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
938 memset(trigger_config, 0, 16);
939 trigger_config[devc->num_stages - 1] |= 0x08;
940 if (devc->trigger_mask[0]) {
941 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
942 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
944 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_0,
945 reverse32(devc->trigger_mask[0])) != SR_OK)
947 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_0,
948 reverse32(devc->trigger_value[0])) != SR_OK)
950 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
951 trigger_config[0]) != SR_OK)
954 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_1,
955 reverse32(devc->trigger_mask[1])) != SR_OK)
957 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_1,
958 reverse32(devc->trigger_value[1])) != SR_OK)
960 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
961 trigger_config[1]) != SR_OK)
964 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_2,
965 reverse32(devc->trigger_mask[2])) != SR_OK)
967 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_2,
968 reverse32(devc->trigger_value[2])) != SR_OK)
970 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
971 trigger_config[2]) != SR_OK)
974 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_3,
975 reverse32(devc->trigger_mask[3])) != SR_OK)
977 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_3,
978 reverse32(devc->trigger_value[3])) != SR_OK)
980 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
981 trigger_config[3]) != SR_OK)
984 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_0,
985 devc->trigger_mask[0]) != SR_OK)
987 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_0,
988 devc->trigger_value[0]) != SR_OK)
990 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
991 0x00000008) != SR_OK)
993 delaycount = readcount;
996 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
997 "demux %s)", devc->cur_samplerate, devc->cur_samplerate_divider,
998 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
999 if (send_longcommand(devc->serial->fd, CMD_SET_DIVIDER,
1000 reverse32(devc->cur_samplerate_divider)) != SR_OK)
1003 /* Send sample limit and pre/post-trigger capture ratio. */
1004 data = ((readcount - 1) & 0xffff) << 16;
1005 data |= (delaycount - 1) & 0xffff;
1006 if (send_longcommand(devc->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
1009 /* The flag register wants them here, and 1 means "disable channel". */
1010 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
1011 devc->flag_reg |= FLAG_FILTER;
1012 devc->rle_count = 0;
1013 data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
1014 if (send_longcommand(devc->serial->fd, CMD_SET_FLAGS, data) != SR_OK)
1017 /* Start acquisition on the device. */
1018 if (send_shortcommand(devc->serial->fd, CMD_RUN) != SR_OK)
1021 sr_source_add(devc->serial->fd, G_IO_IN, -1, receive_data,
1024 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1025 sr_err("ols: %s: packet malloc failed", __func__);
1026 return SR_ERR_MALLOC;
1029 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1030 sr_err("ols: %s: header malloc failed", __func__);
1032 return SR_ERR_MALLOC;
1035 /* Send header packet to the session bus. */
1036 packet->type = SR_DF_HEADER;
1037 packet->payload = (unsigned char *)header;
1038 header->feed_version = 1;
1039 gettimeofday(&header->starttime, NULL);
1040 sr_session_send(cb_data, packet);
1042 /* Send metadata about the SR_DF_LOGIC packets to come. */
1043 packet->type = SR_DF_META_LOGIC;
1044 packet->payload = &meta;
1045 meta.samplerate = devc->cur_samplerate;
1046 meta.num_probes = NUM_PROBES;
1047 sr_session_send(cb_data, packet);
1055 /* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1056 static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1058 /* Avoid compiler warnings. */
1061 abort_acquisition(sdi);
1066 SR_PRIV struct sr_dev_driver ols_driver_info = {
1068 .longname = "Openbench Logic Sniffer",
1071 .cleanup = hw_cleanup,
1073 .dev_list = hw_dev_list,
1074 .dev_clear = hw_cleanup,
1075 .dev_open = hw_dev_open,
1076 .dev_close = hw_dev_close,
1077 .info_get = hw_info_get,
1078 .dev_config_set = hw_dev_config_set,
1079 .dev_acquisition_start = hw_dev_acquisition_start,
1080 .dev_acquisition_stop = hw_dev_acquisition_stop,