2 * This file is part of the sigrok project.
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <sys/types.h>
38 #include <arpa/inet.h>
41 #include "libsigrok.h"
42 #include "libsigrok-internal.h"
46 #define O_NONBLOCK FIONBIO
49 static const int hwcaps[] = {
50 SR_HWCAP_LOGIC_ANALYZER,
52 SR_HWCAP_CAPTURE_RATIO,
53 SR_HWCAP_LIMIT_SAMPLES,
58 /* Probes are numbered 0-31 (on the PCB silkscreen). */
59 static const char *probe_names[NUM_PROBES + 1] = {
95 /* default supported samplerates, can be overridden by device metadata */
96 static const struct sr_samplerates samplerates = {
103 SR_PRIV struct sr_dev_driver ols_driver_info;
104 static struct sr_dev_driver *odi = &ols_driver_info;
106 static int send_shortcommand(int fd, uint8_t command)
110 sr_dbg("ols: sending cmd 0x%.2x", command);
112 if (serial_write(fd, buf, 1) != 1)
118 static int send_longcommand(int fd, uint8_t command, uint32_t data)
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(fd, buf, 5) != 5)
134 static int configure_probes(struct context *ctx, const GSList *probes)
136 const struct sr_probe *probe;
138 int probe_bit, stage, i;
142 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
143 ctx->trigger_mask[i] = 0;
144 ctx->trigger_value[i] = 0;
148 for (l = probes; l; l = l->next) {
149 probe = (const struct sr_probe *)l->data;
154 * Set up the probe mask for later configuration into the
157 probe_bit = 1 << (probe->index - 1);
158 ctx->probe_mask |= probe_bit;
163 /* Configure trigger mask and value. */
165 for (tc = probe->trigger; tc && *tc; tc++) {
166 ctx->trigger_mask[stage] |= probe_bit;
168 ctx->trigger_value[stage] |= probe_bit;
172 * TODO: Only supporting parallel mode, with
177 if (stage > ctx->num_stages)
178 ctx->num_stages = stage;
184 static uint32_t reverse16(uint32_t in)
188 out = (in & 0xff) << 8;
189 out |= (in & 0xff00) >> 8;
190 out |= (in & 0xff0000) << 8;
191 out |= (in & 0xff000000) >> 8;
196 static uint32_t reverse32(uint32_t in)
200 out = (in & 0xff) << 24;
201 out |= (in & 0xff00) << 8;
202 out |= (in & 0xff0000) >> 8;
203 out |= (in & 0xff000000) >> 24;
208 static struct context *ols_dev_new(void)
212 /* TODO: Is 'ctx' ever g_free()'d? */
213 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
214 sr_err("ols: %s: ctx malloc failed", __func__);
218 ctx->trigger_at = -1;
219 ctx->probe_mask = 0xffffffff;
220 ctx->cur_samplerate = SR_KHZ(200);
226 static struct sr_dev_inst *get_metadata(int fd)
228 struct sr_dev_inst *sdi;
230 struct sr_probe *probe;
231 uint32_t tmp_int, ui;
232 uint8_t key, type, token;
233 GString *tmp_str, *devname, *version;
236 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
240 devname = g_string_new("");
241 version = g_string_new("");
245 if (serial_read(fd, &key, 1) != 1 || key == 0x00)
251 /* NULL-terminated string */
252 tmp_str = g_string_new("");
253 while (serial_read(fd, &tmp_c, 1) == 1 && tmp_c != '\0')
254 g_string_append_c(tmp_str, tmp_c);
255 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
260 devname = g_string_append(devname, tmp_str->str);
263 /* FPGA firmware version */
265 g_string_append(version, ", ");
266 g_string_append(version, "FPGA version ");
267 g_string_append(version, tmp_str->str);
270 /* Ancillary version */
272 g_string_append(version, ", ");
273 g_string_append(version, "Ancillary version ");
274 g_string_append(version, tmp_str->str);
277 sr_info("ols: unknown token 0x%.2x: '%s'",
278 token, tmp_str->str);
281 g_string_free(tmp_str, TRUE);
284 /* 32-bit unsigned integer */
285 if (serial_read(fd, &tmp_int, 4) != 4)
287 tmp_int = reverse32(tmp_int);
288 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
292 /* Number of usable probes */
293 for (ui = 0; ui < tmp_int; ui++) {
294 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
297 sdi->probes = g_slist_append(sdi->probes, probe);
301 /* Amount of sample memory available (bytes) */
302 ctx->max_samples = tmp_int;
305 /* Amount of dynamic memory available (bytes) */
306 /* what is this for? */
309 /* Maximum sample rate (hz) */
310 ctx->max_samplerate = tmp_int;
313 /* protocol version */
314 ctx->protocol_version = tmp_int;
317 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
323 /* 8-bit unsigned integer */
324 if (serial_read(fd, &tmp_c, 1) != 1)
326 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
330 /* Number of usable probes */
331 for (ui = 0; ui < tmp_c; ui++) {
332 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
335 sdi->probes = g_slist_append(sdi->probes, probe);
339 /* protocol version */
340 ctx->protocol_version = tmp_c;
343 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
354 sdi->model = devname->str;
355 sdi->version = version->str;
356 g_string_free(devname, FALSE);
357 g_string_free(version, FALSE);
362 static int hw_init(void)
370 static GSList *hw_scan(GSList *options)
372 struct sr_dev_inst *sdi;
374 struct sr_probe *probe;
375 GSList *devices, *ports, *l;
376 GPollFD *fds, probefd;
377 int devcnt, final_devcnt, num_ports, fd, ret, i, j;
378 char buf[8], **dev_names, **serial_params;
384 /* Scan all serial ports. */
385 ports = list_serial_ports();
386 num_ports = g_slist_length(ports);
388 if (!(fds = g_try_malloc0(num_ports * sizeof(GPollFD)))) {
389 sr_err("ols: %s: fds malloc failed", __func__);
390 goto hw_init_free_ports; /* TODO: SR_ERR_MALLOC. */
393 if (!(dev_names = g_try_malloc(num_ports * sizeof(char *)))) {
394 sr_err("ols: %s: dev_names malloc failed", __func__);
395 goto hw_init_free_fds; /* TODO: SR_ERR_MALLOC. */
398 if (!(serial_params = g_try_malloc(num_ports * sizeof(char *)))) {
399 sr_err("ols: %s: serial_params malloc failed", __func__);
400 goto hw_init_free_dev_names; /* TODO: SR_ERR_MALLOC. */
404 for (l = ports; l; l = l->next) {
405 /* The discovery procedure is like this: first send the Reset
406 * command (0x00) 5 times, since the device could be anywhere
407 * in a 5-byte command. Then send the ID command (0x02).
408 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
411 * Since it may take the device a while to respond at 115Kb/s,
412 * we do all the sending first, then wait for all of them to
413 * respond with g_poll().
415 sr_info("ols: probing %s...", (char *)l->data);
416 fd = serial_open(l->data, O_RDWR | O_NONBLOCK);
418 serial_params[devcnt] = serial_backup_params(fd);
419 serial_set_params(fd, 115200, 8, SERIAL_PARITY_NONE, 1, 2);
421 for (i = 0; i < 5; i++) {
422 if ((ret = send_shortcommand(fd,
423 CMD_RESET)) != SR_OK) {
424 /* Serial port is not writable. */
429 serial_restore_params(fd,
430 serial_params[devcnt]);
434 send_shortcommand(fd, CMD_ID);
436 fds[devcnt].events = G_IO_IN;
437 dev_names[devcnt] = g_strdup(l->data);
443 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
446 g_poll(fds, devcnt, 1);
448 for (i = 0; i < devcnt; i++) {
449 if (fds[i].revents != G_IO_IN)
451 if (serial_read(fds[i].fd, buf, 4) != 4)
453 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
456 /* definitely using the OLS protocol, check if it supports
457 * the metadata command
459 send_shortcommand(fds[i].fd, CMD_METADATA);
460 probefd.fd = fds[i].fd;
461 probefd.events = G_IO_IN;
462 if (g_poll(&probefd, 1, 10) > 0) {
464 sdi = get_metadata(fds[i].fd);
465 sdi->index = final_devcnt;
468 /* not an OLS -- some other board that uses the sump protocol */
469 sdi = sr_dev_inst_new(final_devcnt, SR_ST_INACTIVE,
470 "Sump", "Logic Analyzer", "v1.0");
472 for (j = 0; j < 32; j++) {
473 if (!(probe = sr_probe_new(j, SR_PROBE_LOGIC, TRUE,
476 sdi->probes = g_slist_append(sdi->probes, probe);
480 ctx->serial = sr_serial_dev_inst_new(dev_names[i], -1);
481 odi->instances = g_slist_append(odi->instances, sdi);
482 devices = g_slist_append(devices, sdi);
485 serial_close(fds[i].fd);
489 /* clean up after all the probing */
490 for (i = 0; i < devcnt; i++) {
491 if (fds[i].fd != 0) {
492 serial_restore_params(fds[i].fd, serial_params[i]);
493 serial_close(fds[i].fd);
495 g_free(serial_params[i]);
496 g_free(dev_names[i]);
499 g_free(serial_params);
500 hw_init_free_dev_names:
510 static int hw_dev_open(int dev_index)
512 struct sr_dev_inst *sdi;
515 if (!(sdi = sr_dev_inst_get(odi->instances, dev_index)))
520 ctx->serial->fd = serial_open(ctx->serial->port, O_RDWR);
521 if (ctx->serial->fd == -1)
524 sdi->status = SR_ST_ACTIVE;
529 static int hw_dev_close(int dev_index)
531 struct sr_dev_inst *sdi;
534 if (!(sdi = sr_dev_inst_get(odi->instances, dev_index))) {
535 sr_err("ols: %s: sdi was NULL", __func__);
542 if (ctx->serial->fd != -1) {
543 serial_close(ctx->serial->fd);
544 ctx->serial->fd = -1;
545 sdi->status = SR_ST_INACTIVE;
551 static int hw_cleanup(void)
554 struct sr_dev_inst *sdi;
558 /* Properly close and free all devices. */
559 for (l = odi->instances; l; l = l->next) {
560 if (!(sdi = l->data)) {
561 /* Log error, but continue cleaning up the rest. */
562 sr_err("ols: %s: sdi was NULL, continuing", __func__);
566 if (!(ctx = sdi->priv)) {
567 /* Log error, but continue cleaning up the rest. */
568 sr_err("ols: %s: sdi->priv was NULL, continuing",
573 /* TODO: Check for serial != NULL. */
574 if (ctx->serial->fd != -1)
575 serial_close(ctx->serial->fd);
576 sr_serial_dev_inst_free(ctx->serial);
577 sr_dev_inst_free(sdi);
579 g_slist_free(odi->instances);
580 odi->instances = NULL;
585 static const void *hw_dev_info_get(int dev_index, int dev_info_id)
587 struct sr_dev_inst *sdi;
591 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
596 switch (dev_info_id) {
600 case SR_DI_NUM_PROBES:
601 info = GINT_TO_POINTER(NUM_PROBES);
603 case SR_DI_PROBE_NAMES:
606 case SR_DI_SAMPLERATES:
609 case SR_DI_TRIGGER_TYPES:
610 info = (char *)TRIGGER_TYPES;
612 case SR_DI_CUR_SAMPLERATE:
613 info = &ctx->cur_samplerate;
620 static int hw_dev_status_get(int dev_index)
622 struct sr_dev_inst *sdi;
624 if (!(sdi = sr_dev_inst_get(odi->instances, dev_index)))
625 return SR_ST_NOT_FOUND;
630 static const int *hw_hwcap_get_all(void)
635 static int set_samplerate(struct sr_dev_inst *sdi, uint64_t samplerate)
640 if (ctx->max_samplerate) {
641 if (samplerate > ctx->max_samplerate)
642 return SR_ERR_SAMPLERATE;
643 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
644 return SR_ERR_SAMPLERATE;
646 if (samplerate > CLOCK_RATE) {
647 ctx->flag_reg |= FLAG_DEMUX;
648 ctx->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
650 ctx->flag_reg &= ~FLAG_DEMUX;
651 ctx->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
654 /* Calculate actual samplerate used and complain if it is different
655 * from the requested.
657 ctx->cur_samplerate = CLOCK_RATE / (ctx->cur_samplerate_divider + 1);
658 if (ctx->flag_reg & FLAG_DEMUX)
659 ctx->cur_samplerate *= 2;
660 if (ctx->cur_samplerate != samplerate)
661 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
662 PRIu64, samplerate, ctx->cur_samplerate);
667 static int hw_dev_config_set(int dev_index, int hwcap, const void *value)
669 struct sr_dev_inst *sdi;
672 const uint64_t *tmp_u64;
674 if (!(sdi = sr_dev_inst_get(odi->instances, dev_index)))
678 if (sdi->status != SR_ST_ACTIVE)
682 case SR_HWCAP_SAMPLERATE:
683 ret = set_samplerate(sdi, *(const uint64_t *)value);
685 case SR_HWCAP_PROBECONFIG:
686 ret = configure_probes(ctx, (const GSList *)value);
688 case SR_HWCAP_LIMIT_SAMPLES:
690 if (*tmp_u64 < MIN_NUM_SAMPLES)
692 if (*tmp_u64 > ctx->max_samples)
693 sr_err("ols: sample limit exceeds hw max");
694 ctx->limit_samples = *tmp_u64;
695 sr_info("ols: sample limit %" PRIu64, ctx->limit_samples);
698 case SR_HWCAP_CAPTURE_RATIO:
699 ctx->capture_ratio = *(const uint64_t *)value;
700 if (ctx->capture_ratio < 0 || ctx->capture_ratio > 100) {
701 ctx->capture_ratio = 0;
707 if (GPOINTER_TO_INT(value)) {
708 sr_info("ols: enabling RLE");
709 ctx->flag_reg |= FLAG_RLE;
720 static int receive_data(int fd, int revents, void *cb_data)
722 struct sr_datafeed_packet packet;
723 struct sr_datafeed_logic logic;
724 struct sr_dev_inst *sdi;
727 int num_channels, offset, i, j;
730 /* Find this device's ctx struct by its fd. */
732 for (l = odi->instances; l; l = l->next) {
735 if (ctx->serial->fd == fd) {
741 /* Shouldn't happen. */
744 if (ctx->num_transfers++ == 0) {
746 * First time round, means the device started sending data,
747 * and will not stop until done. If it stops sending for
748 * longer than it takes to send a byte, that means it's
749 * finished. We'll double that to 30ms to be sure...
751 sr_source_remove(fd);
752 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
753 ctx->raw_sample_buf = g_try_malloc(ctx->limit_samples * 4);
754 if (!ctx->raw_sample_buf) {
755 sr_err("ols: %s: ctx->raw_sample_buf malloc failed",
759 /* fill with 1010... for debugging */
760 memset(ctx->raw_sample_buf, 0x82, ctx->limit_samples * 4);
764 for (i = 0x20; i > 0x02; i /= 2) {
765 if ((ctx->flag_reg & i) == 0)
769 if (revents == G_IO_IN) {
770 if (serial_read(fd, &byte, 1) != 1)
773 /* Ignore it if we've read enough. */
774 if (ctx->num_samples >= ctx->limit_samples)
777 ctx->sample[ctx->num_bytes++] = byte;
778 sr_dbg("ols: received byte 0x%.2x", byte);
779 if (ctx->num_bytes == num_channels) {
780 /* Got a full sample. */
781 sr_dbg("ols: received sample 0x%.*x",
782 ctx->num_bytes * 2, *(int *)ctx->sample);
783 if (ctx->flag_reg & FLAG_RLE) {
785 * In RLE mode -1 should never come in as a
786 * sample, because bit 31 is the "count" flag.
788 if (ctx->sample[ctx->num_bytes - 1] & 0x80) {
789 ctx->sample[ctx->num_bytes - 1] &= 0x7f;
791 * FIXME: This will only work on
792 * little-endian systems.
794 ctx->rle_count = *(int *)(ctx->sample);
795 sr_dbg("ols: RLE count = %d", ctx->rle_count);
800 ctx->num_samples += ctx->rle_count + 1;
801 if (ctx->num_samples > ctx->limit_samples) {
802 /* Save us from overrunning the buffer. */
803 ctx->rle_count -= ctx->num_samples - ctx->limit_samples;
804 ctx->num_samples = ctx->limit_samples;
807 if (num_channels < 4) {
809 * Some channel groups may have been turned
810 * off, to speed up transfer between the
811 * hardware and the PC. Expand that here before
812 * submitting it over the session bus --
813 * whatever is listening on the bus will be
814 * expecting a full 32-bit sample, based on
815 * the number of probes.
818 memset(ctx->tmp_sample, 0, 4);
819 for (i = 0; i < 4; i++) {
820 if (((ctx->flag_reg >> 2) & (1 << i)) == 0) {
822 * This channel group was
823 * enabled, copy from received
826 ctx->tmp_sample[i] = ctx->sample[j++];
829 memcpy(ctx->sample, ctx->tmp_sample, 4);
830 sr_dbg("ols: full sample 0x%.8x", *(int *)ctx->sample);
833 /* the OLS sends its sample buffer backwards.
834 * store it in reverse order here, so we can dump
835 * this on the session bus later.
837 offset = (ctx->limit_samples - ctx->num_samples) * 4;
838 for (i = 0; i <= ctx->rle_count; i++) {
839 memcpy(ctx->raw_sample_buf + offset + (i * 4),
842 memset(ctx->sample, 0, 4);
848 * This is the main loop telling us a timeout was reached, or
849 * we've acquired all the samples we asked for -- we're done.
850 * Send the (properly-ordered) buffer to the frontend.
852 if (ctx->trigger_at != -1) {
853 /* a trigger was set up, so we need to tell the frontend
856 if (ctx->trigger_at > 0) {
857 /* there are pre-trigger samples, send those first */
858 packet.type = SR_DF_LOGIC;
859 packet.payload = &logic;
860 logic.length = ctx->trigger_at * 4;
862 logic.data = ctx->raw_sample_buf +
863 (ctx->limit_samples - ctx->num_samples) * 4;
864 sr_session_send(cb_data, &packet);
867 /* send the trigger */
868 packet.type = SR_DF_TRIGGER;
869 sr_session_send(cb_data, &packet);
871 /* send post-trigger samples */
872 packet.type = SR_DF_LOGIC;
873 packet.payload = &logic;
874 logic.length = (ctx->num_samples * 4) - (ctx->trigger_at * 4);
876 logic.data = ctx->raw_sample_buf + ctx->trigger_at * 4 +
877 (ctx->limit_samples - ctx->num_samples) * 4;
878 sr_session_send(cb_data, &packet);
880 /* no trigger was used */
881 packet.type = SR_DF_LOGIC;
882 packet.payload = &logic;
883 logic.length = ctx->num_samples * 4;
885 logic.data = ctx->raw_sample_buf +
886 (ctx->limit_samples - ctx->num_samples) * 4;
887 sr_session_send(cb_data, &packet);
889 g_free(ctx->raw_sample_buf);
893 packet.type = SR_DF_END;
894 sr_session_send(cb_data, &packet);
900 static int hw_dev_acquisition_start(int dev_index, void *cb_data)
902 struct sr_datafeed_packet *packet;
903 struct sr_datafeed_header *header;
904 struct sr_datafeed_meta_logic meta;
905 struct sr_dev_inst *sdi;
907 uint32_t trigger_config[4];
909 uint16_t readcount, delaycount;
910 uint8_t changrp_mask;
914 if (!(sdi = sr_dev_inst_get(odi->instances, dev_index)))
919 if (sdi->status != SR_ST_ACTIVE)
923 * Enable/disable channel groups in the flag register according to the
924 * probe mask. Calculate this here, because num_channels is needed
925 * to limit readcount.
929 for (i = 0; i < 4; i++) {
930 if (ctx->probe_mask & (0xff << (i * 8))) {
931 changrp_mask |= (1 << i);
937 * Limit readcount to prevent reading past the end of the hardware
940 readcount = MIN(ctx->max_samples / num_channels, ctx->limit_samples) / 4;
942 memset(trigger_config, 0, 16);
943 trigger_config[ctx->num_stages - 1] |= 0x08;
944 if (ctx->trigger_mask[0]) {
945 delaycount = readcount * (1 - ctx->capture_ratio / 100.0);
946 ctx->trigger_at = (readcount - delaycount) * 4 - ctx->num_stages;
948 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
949 reverse32(ctx->trigger_mask[0])) != SR_OK)
951 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
952 reverse32(ctx->trigger_value[0])) != SR_OK)
954 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
955 trigger_config[0]) != SR_OK)
958 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_1,
959 reverse32(ctx->trigger_mask[1])) != SR_OK)
961 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_1,
962 reverse32(ctx->trigger_value[1])) != SR_OK)
964 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
965 trigger_config[1]) != SR_OK)
968 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_2,
969 reverse32(ctx->trigger_mask[2])) != SR_OK)
971 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_2,
972 reverse32(ctx->trigger_value[2])) != SR_OK)
974 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
975 trigger_config[2]) != SR_OK)
978 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_3,
979 reverse32(ctx->trigger_mask[3])) != SR_OK)
981 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_3,
982 reverse32(ctx->trigger_value[3])) != SR_OK)
984 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
985 trigger_config[3]) != SR_OK)
988 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
989 ctx->trigger_mask[0]) != SR_OK)
991 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
992 ctx->trigger_value[0]) != SR_OK)
994 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
995 0x00000008) != SR_OK)
997 delaycount = readcount;
1000 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
1001 "demux %s)", ctx->cur_samplerate, ctx->cur_samplerate_divider,
1002 ctx->flag_reg & FLAG_DEMUX ? "on" : "off");
1003 if (send_longcommand(ctx->serial->fd, CMD_SET_DIVIDER,
1004 reverse32(ctx->cur_samplerate_divider)) != SR_OK)
1007 /* Send sample limit and pre/post-trigger capture ratio. */
1008 data = ((readcount - 1) & 0xffff) << 16;
1009 data |= (delaycount - 1) & 0xffff;
1010 if (send_longcommand(ctx->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
1013 /* The flag register wants them here, and 1 means "disable channel". */
1014 ctx->flag_reg |= ~(changrp_mask << 2) & 0x3c;
1015 ctx->flag_reg |= FLAG_FILTER;
1017 data = (ctx->flag_reg << 24) | ((ctx->flag_reg << 8) & 0xff0000);
1018 if (send_longcommand(ctx->serial->fd, CMD_SET_FLAGS, data) != SR_OK)
1021 /* Start acquisition on the device. */
1022 if (send_shortcommand(ctx->serial->fd, CMD_RUN) != SR_OK)
1025 sr_source_add(ctx->serial->fd, G_IO_IN, -1, receive_data,
1028 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1029 sr_err("ols: %s: packet malloc failed", __func__);
1030 return SR_ERR_MALLOC;
1033 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1034 sr_err("ols: %s: header malloc failed", __func__);
1036 return SR_ERR_MALLOC;
1039 /* Send header packet to the session bus. */
1040 packet->type = SR_DF_HEADER;
1041 packet->payload = (unsigned char *)header;
1042 header->feed_version = 1;
1043 gettimeofday(&header->starttime, NULL);
1044 sr_session_send(cb_data, packet);
1046 /* Send metadata about the SR_DF_LOGIC packets to come. */
1047 packet->type = SR_DF_META_LOGIC;
1048 packet->payload = &meta;
1049 meta.samplerate = ctx->cur_samplerate;
1050 meta.num_probes = NUM_PROBES;
1051 sr_session_send(cb_data, packet);
1059 /* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1060 static int hw_dev_acquisition_stop(int dev_index, void *cb_data)
1062 struct sr_datafeed_packet packet;
1064 /* Avoid compiler warnings. */
1067 packet.type = SR_DF_END;
1068 sr_session_send(cb_data, &packet);
1073 SR_PRIV struct sr_dev_driver ols_driver_info = {
1075 .longname = "Openbench Logic Sniffer",
1078 .cleanup = hw_cleanup,
1080 .dev_open = hw_dev_open,
1081 .dev_close = hw_dev_close,
1082 .dev_info_get = hw_dev_info_get,
1083 .dev_status_get = hw_dev_status_get,
1084 .hwcap_get_all = hw_hwcap_get_all,
1085 .dev_config_set = hw_dev_config_set,
1086 .dev_acquisition_start = hw_dev_acquisition_start,
1087 .dev_acquisition_stop = hw_dev_acquisition_stop,