]> sigrok.org Git - libsigrok.git/blob - hardware/asix-sigma/asix-sigma.h
This commit adds initial support for the Asix Sigma Logic Analyzer. Currently, only...
[libsigrok.git] / hardware / asix-sigma / asix-sigma.h
1 #ifndef ASIX_SIGMA_H
2 #define ASIX_SIGMA_H
3
4 enum sigma_write_register
5 {
6         WRITE_CLOCK_SELECT      = 0,
7         WRITE_TRIGGER_SELECT0   = 1,
8         WRITE_TRIGGER_SELECT1   = 2,
9         WRITE_MODE              = 3,
10         WRITE_MEMROW            = 4,
11         WRITE_POST_TRIGGER      = 5,
12         WRITE_TRIGGER_OPTION    = 6,
13         WRITE_PIN_VIEW          = 7,
14
15         WRITE_TEST              = 15
16 };
17
18 enum sigma_read_register
19 {
20         READ_ID                 = 0,
21         READ_TRIGGER_POS_LOW    = 1,
22         READ_TRIGGER_POS_HIGH   = 2,
23         READ_TRIGGER_POS_UP     = 3,
24         READ_STOP_POS_LOW       = 4,
25         READ_STOP_POS_HIGH      = 5,
26         READ_STOP_POS_UP        = 6,
27         READ_MODE               = 7,
28         READ_PIN_CHANGE_LOW     = 8,
29         READ_PIN_CHANGE_HIGH    = 9,
30         READ_BLOCK_LAST_TS_LOW  = 10,
31         READ_BLOCK_LAST_TS_HIGH = 11,
32         READ_PIN_VIEW           = 12,
33
34         READ_TEST               = 15
35 };
36
37 #define REG_ADDR_LOW            (0 << 4)
38 #define REG_ADDR_HIGH           (1 << 4)
39 #define REG_DATA_LOW            (2 << 4)
40 #define REG_DATA_HIGH_WRITE     (3 << 4)
41 #define REG_READ_ADDR           (4 << 4)
42 #define REG_DRAM_WAIT_ACK       (5 << 4)
43
44 /* Bit (1 << 4) can be low or high (double buffer / cache) */
45 #define REG_DRAM_BLOCK          (6 << 4)
46 #define REG_DRAM_BLOCK_BEGIN    (8 << 4)
47 #define REG_DRAM_BLOCK_DATA     (10 << 4)
48
49 #define NEXT_REG                1
50
51 #define EVENTS_PER_CLUSTER      7
52
53 #define CHUNK_SIZE              1024
54
55 #endif /* ASIX_SIGMA_H */
56
57 // vim:noexpandtab:ts=8 sts=8 sw=8