2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX Sigma Logic Analyzer Driver
28 #include <glib/gstdio.h>
33 #include "asix-sigma.h"
35 #define USB_VENDOR 0xa600
36 #define USB_PRODUCT 0xa000
37 #define USB_DESCRIPTION "ASIX SIGMA"
38 #define USB_VENDOR_NAME "ASIX"
39 #define USB_MODEL_NAME "SIGMA"
40 #define USB_MODEL_VERSION ""
41 #define TRIGGER_TYPES "rf10"
43 static GSList *device_instances = NULL;
45 static uint64_t supported_samplerates[] = {
59 static struct samplerates samplerates = {
63 supported_samplerates,
66 static int capabilities[] = {
67 SR_HWCAP_LOGIC_ANALYZER,
69 SR_HWCAP_CAPTURE_RATIO,
76 /* Force the FPGA to reboot. */
77 static uint8_t suicide[] = {
78 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
81 /* Prepare to upload firmware (FPGA specific). */
82 static uint8_t init[] = {
83 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
86 /* Initialize the logic analyzer mode. */
87 static uint8_t logic_mode_start[] = {
88 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
89 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
92 static const char *firmware_files[] = {
93 "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
94 "asix-sigma-100.fw", /* 100 MHz */
95 "asix-sigma-200.fw", /* 200 MHz */
96 "asix-sigma-50sync.fw", /* Synchronous clock from pin */
97 "asix-sigma-phasor.fw", /* Frequency counter */
100 static void hw_stop_acquisition(int device_index, gpointer session_device_id);
102 static int sigma_read(void *buf, size_t size, struct sigma *sigma)
106 ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size);
108 g_warning("ftdi_read_data failed: %s",
109 ftdi_get_error_string(&sigma->ftdic));
115 static int sigma_write(void *buf, size_t size, struct sigma *sigma)
119 ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size);
121 g_warning("ftdi_write_data failed: %s",
122 ftdi_get_error_string(&sigma->ftdic));
123 } else if ((size_t) ret != size) {
124 g_warning("ftdi_write_data did not complete write\n");
130 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
134 uint8_t buf[len + 2];
137 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
138 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
140 for (i = 0; i < len; ++i) {
141 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
142 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
145 return sigma_write(buf, idx, sigma);
148 static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma)
150 return sigma_write_register(reg, &value, 1, sigma);
153 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len,
158 buf[0] = REG_ADDR_LOW | (reg & 0xf);
159 buf[1] = REG_ADDR_HIGH | (reg >> 4);
160 buf[2] = REG_READ_ADDR;
162 sigma_write(buf, sizeof(buf), sigma);
164 return sigma_read(data, len, sigma);
167 static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma)
171 if (1 != sigma_read_register(reg, &value, 1, sigma)) {
172 g_warning("Sigma_get_register: 1 byte expected");
179 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos,
183 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
185 REG_READ_ADDR | NEXT_REG,
186 REG_READ_ADDR | NEXT_REG,
187 REG_READ_ADDR | NEXT_REG,
188 REG_READ_ADDR | NEXT_REG,
189 REG_READ_ADDR | NEXT_REG,
190 REG_READ_ADDR | NEXT_REG,
194 sigma_write(buf, sizeof(buf), sigma);
196 sigma_read(result, sizeof(result), sigma);
198 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
199 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
201 /* Not really sure why this must be done, but according to spec. */
202 if ((--*stoppos & 0x1ff) == 0x1ff)
205 if ((*--triggerpos & 0x1ff) == 0x1ff)
211 static int sigma_read_dram(uint16_t startchunk, size_t numchunks,
212 uint8_t *data, struct sigma *sigma)
218 /* Send the startchunk. Index start with 1. */
219 buf[0] = startchunk >> 8;
220 buf[1] = startchunk & 0xff;
221 sigma_write_register(WRITE_MEMROW, buf, 2, sigma);
224 buf[idx++] = REG_DRAM_BLOCK;
225 buf[idx++] = REG_DRAM_WAIT_ACK;
227 for (i = 0; i < numchunks; ++i) {
228 /* Alternate bit to copy from DRAM to cache. */
229 if (i != (numchunks - 1))
230 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
232 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
234 if (i != (numchunks - 1))
235 buf[idx++] = REG_DRAM_WAIT_ACK;
238 sigma_write(buf, idx, sigma);
240 return sigma_read(data, numchunks * CHUNK_SIZE, sigma);
243 /* Upload trigger look-up tables to Sigma. */
244 static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma)
250 /* Transpose the table and send to Sigma. */
251 for (i = 0; i < 16; ++i) {
256 if (lut->m2d[0] & bit)
258 if (lut->m2d[1] & bit)
260 if (lut->m2d[2] & bit)
262 if (lut->m2d[3] & bit)
272 if (lut->m0d[0] & bit)
274 if (lut->m0d[1] & bit)
276 if (lut->m0d[2] & bit)
278 if (lut->m0d[3] & bit)
281 if (lut->m1d[0] & bit)
283 if (lut->m1d[1] & bit)
285 if (lut->m1d[2] & bit)
287 if (lut->m1d[3] & bit)
290 sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp),
292 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma);
295 /* Send the parameters */
296 sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
297 sizeof(lut->params), sigma);
302 /* Generate the bitbang stream for programming the FPGA. */
303 static int bin2bitbang(const char *filename,
304 unsigned char **buf, size_t *buf_size)
308 unsigned long offset = 0;
310 uint8_t *compressed_buf, *firmware;
311 uLongf csize, fwsize;
312 const int buffer_size = 65536;
315 uint32_t imm = 0x3f6df2ab;
317 f = g_fopen(filename, "rb");
319 g_warning("g_fopen(\"%s\", \"rb\")", filename);
323 if (-1 == fseek(f, 0, SEEK_END)) {
324 g_warning("fseek on %s failed", filename);
329 file_size = ftell(f);
331 fseek(f, 0, SEEK_SET);
333 compressed_buf = g_malloc(file_size);
334 firmware = g_malloc(buffer_size);
336 if (!compressed_buf || !firmware) {
337 g_warning("Error allocating buffers");
342 while ((c = getc(f)) != EOF) {
343 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
344 compressed_buf[csize++] = c ^ imm;
348 fwsize = buffer_size;
349 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
351 g_free(compressed_buf);
353 g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
357 g_free(compressed_buf);
359 *buf_size = fwsize * 2 * 8;
361 *buf = p = (unsigned char *)g_malloc(*buf_size);
364 g_warning("Error allocating buffers");
368 for (i = 0; i < fwsize; ++i) {
369 for (bit = 7; bit >= 0; --bit) {
370 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
371 p[offset++] = v | 0x01;
378 if (offset != *buf_size) {
380 g_warning("Error reading firmware %s "
381 "offset=%ld, file_size=%ld, buf_size=%zd\n",
382 filename, offset, file_size, *buf_size);
390 static int hw_init(char *deviceinfo)
392 struct sr_device_instance *sdi;
393 struct sigma *sigma = g_malloc(sizeof(struct sigma));
395 deviceinfo = deviceinfo;
400 ftdi_init(&sigma->ftdic);
402 /* Look for SIGMAs. */
403 if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT,
404 USB_DESCRIPTION, NULL) < 0)
407 sigma->cur_samplerate = 0;
408 sigma->limit_msec = 0;
409 sigma->cur_firmware = -1;
410 sigma->num_probes = 0;
411 sigma->samples_per_event = 0;
412 sigma->capture_ratio = 50;
413 sigma->use_triggers = 0;
415 /* Register SIGMA device. */
416 sdi = sr_device_instance_new(0, SR_ST_INITIALIZING,
417 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
423 device_instances = g_slist_append(device_instances, sdi);
425 /* We will open the device again when we need it. */
426 ftdi_usb_close(&sigma->ftdic);
434 static int upload_firmware(int firmware_idx, struct sigma *sigma)
440 unsigned char result[32];
441 char firmware_path[128];
443 /* Make sure it's an ASIX SIGMA. */
444 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
445 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
446 g_warning("ftdi_usb_open failed: %s",
447 ftdi_get_error_string(&sigma->ftdic));
451 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
452 g_warning("ftdi_set_bitmode failed: %s",
453 ftdi_get_error_string(&sigma->ftdic));
457 /* Four times the speed of sigmalogan - Works well. */
458 if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) {
459 g_warning("ftdi_set_baudrate failed: %s",
460 ftdi_get_error_string(&sigma->ftdic));
464 /* Force the FPGA to reboot. */
465 sigma_write(suicide, sizeof(suicide), sigma);
466 sigma_write(suicide, sizeof(suicide), sigma);
467 sigma_write(suicide, sizeof(suicide), sigma);
468 sigma_write(suicide, sizeof(suicide), sigma);
470 /* Prepare to upload firmware (FPGA specific). */
471 sigma_write(init, sizeof(init), sigma);
473 ftdi_usb_purge_buffers(&sigma->ftdic);
475 /* Wait until the FPGA asserts INIT_B. */
477 ret = sigma_read(result, 1, sigma);
478 if (result[0] & 0x20)
482 /* Prepare firmware. */
483 snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
484 firmware_files[firmware_idx]);
486 if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) {
487 g_warning("An error occured while reading the firmware: %s",
492 /* Upload firmare. */
493 sigma_write(buf, buf_size, sigma);
497 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) {
498 g_warning("ftdi_set_bitmode failed: %s",
499 ftdi_get_error_string(&sigma->ftdic));
503 ftdi_usb_purge_buffers(&sigma->ftdic);
505 /* Discard garbage. */
506 while (1 == sigma_read(&pins, 1, sigma))
509 /* Initialize the logic analyzer mode. */
510 sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma);
512 /* Expect a 3 byte reply. */
513 ret = sigma_read(result, 3, sigma);
515 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
516 g_warning("Configuration failed. Invalid reply received.");
520 sigma->cur_firmware = firmware_idx;
525 static int hw_opendev(int device_index)
527 struct sr_device_instance *sdi;
531 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
536 /* Make sure it's an ASIX SIGMA. */
537 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
538 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
540 g_warning("ftdi_usb_open failed: %s",
541 ftdi_get_error_string(&sigma->ftdic));
546 sdi->status = SR_ST_ACTIVE;
551 static int set_samplerate(struct sr_device_instance *sdi,
555 struct sigma *sigma = sdi->priv;
557 for (i = 0; supported_samplerates[i]; i++) {
558 if (supported_samplerates[i] == samplerate)
561 if (supported_samplerates[i] == 0)
562 return SR_ERR_SAMPLERATE;
564 if (samplerate <= MHZ(50)) {
565 ret = upload_firmware(0, sigma);
566 sigma->num_probes = 16;
568 if (samplerate == MHZ(100)) {
569 ret = upload_firmware(1, sigma);
570 sigma->num_probes = 8;
572 else if (samplerate == MHZ(200)) {
573 ret = upload_firmware(2, sigma);
574 sigma->num_probes = 4;
577 sigma->cur_samplerate = samplerate;
578 sigma->samples_per_event = 16 / sigma->num_probes;
579 sigma->state.state = SIGMA_IDLE;
581 g_message("Firmware uploaded");
587 * In 100 and 200 MHz mode, only a single pin rising/falling can be
588 * set as trigger. In other modes, two rising/falling triggers can be set,
589 * in addition to value/mask trigger for any number of probes.
591 * The Sigma supports complex triggers using boolean expressions, but this
592 * has not been implemented yet.
594 static int configure_probes(struct sr_device_instance *sdi, GSList *probes)
596 struct sigma *sigma = sdi->priv;
597 struct sr_probe *probe;
602 memset(&sigma->trigger, 0, sizeof(struct sigma_trigger));
604 for (l = probes; l; l = l->next) {
605 probe = (struct sr_probe *)l->data;
606 probebit = 1 << (probe->index - 1);
608 if (!probe->enabled || !probe->trigger)
611 if (sigma->cur_samplerate >= MHZ(100)) {
612 /* Fast trigger support. */
614 g_warning("Asix Sigma only supports a single "
615 "pin trigger in 100 and 200 "
619 if (probe->trigger[0] == 'f')
620 sigma->trigger.fallingmask |= probebit;
621 else if (probe->trigger[0] == 'r')
622 sigma->trigger.risingmask |= probebit;
624 g_warning("Asix Sigma only supports "
625 "rising/falling trigger in 100 "
626 "and 200 MHz mode.");
632 /* Simple trigger support (event). */
633 if (probe->trigger[0] == '1') {
634 sigma->trigger.simplevalue |= probebit;
635 sigma->trigger.simplemask |= probebit;
637 else if (probe->trigger[0] == '0') {
638 sigma->trigger.simplevalue &= ~probebit;
639 sigma->trigger.simplemask |= probebit;
641 else if (probe->trigger[0] == 'f') {
642 sigma->trigger.fallingmask |= probebit;
645 else if (probe->trigger[0] == 'r') {
646 sigma->trigger.risingmask |= probebit;
651 * Actually, Sigma supports 2 rising/falling triggers,
652 * but they are ORed and the current trigger syntax
653 * does not permit ORed triggers.
655 if (trigger_set > 1) {
656 g_warning("Asix Sigma only supports 1 rising/"
657 "falling triggers.");
663 sigma->use_triggers = 1;
669 static void hw_closedev(int device_index)
671 struct sr_device_instance *sdi;
674 if ((sdi = sr_get_device_instance(device_instances, device_index)))
677 if (sdi->status == SR_ST_ACTIVE)
678 ftdi_usb_close(&sigma->ftdic);
680 sdi->status = SR_ST_INACTIVE;
684 static void hw_cleanup(void)
687 struct sr_device_instance *sdi;
689 /* Properly close all devices. */
690 for (l = device_instances; l; l = l->next) {
692 if (sdi->priv != NULL)
694 sr_device_instance_free(sdi);
696 g_slist_free(device_instances);
697 device_instances = NULL;
700 static void *hw_get_device_info(int device_index, int device_info_id)
702 struct sr_device_instance *sdi;
706 if (!(sdi = sr_get_device_instance(device_instances, device_index))) {
707 fprintf(stderr, "It's NULL.\n");
713 switch (device_info_id) {
717 case SR_DI_NUM_PROBES:
718 info = GINT_TO_POINTER(16);
720 case SR_DI_SAMPLERATES:
723 case SR_DI_TRIGGER_TYPES:
724 info = (char *)TRIGGER_TYPES;
726 case SR_DI_CUR_SAMPLERATE:
727 info = &sigma->cur_samplerate;
734 static int hw_get_status(int device_index)
736 struct sr_device_instance *sdi;
738 sdi = sr_get_device_instance(device_instances, device_index);
742 return SR_ST_NOT_FOUND;
745 static int *hw_get_capabilities(void)
750 static int hw_set_configuration(int device_index, int capability, void *value)
752 struct sr_device_instance *sdi;
756 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
761 if (capability == SR_HWCAP_SAMPLERATE) {
762 ret = set_samplerate(sdi, *(uint64_t*) value);
763 } else if (capability == SR_HWCAP_PROBECONFIG) {
764 ret = configure_probes(sdi, value);
765 } else if (capability == SR_HWCAP_LIMIT_MSEC) {
766 sigma->limit_msec = *(uint64_t*) value;
767 if (sigma->limit_msec > 0)
771 } else if (capability == SR_HWCAP_CAPTURE_RATIO) {
772 sigma->capture_ratio = *(uint64_t*) value;
773 if (sigma->capture_ratio < 0 || sigma->capture_ratio > 100)
784 /* Software trigger to determine exact trigger position. */
785 static int get_trigger_offset(uint16_t *samples, uint16_t last_sample,
786 struct sigma_trigger *t)
790 for (i = 0; i < 8; ++i) {
792 last_sample = samples[i-1];
794 /* Simple triggers. */
795 if ((samples[i] & t->simplemask) != t->simplevalue)
799 if ((last_sample & t->risingmask) != 0 || (samples[i] &
800 t->risingmask) != t->risingmask)
804 if ((last_sample & t->fallingmask) != t->fallingmask ||
805 (samples[i] & t->fallingmask) != 0)
811 /* If we did not match, return original trigger pos. */
816 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
817 * Each event is 20ns apart, and can contain multiple samples.
819 * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart.
820 * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart.
821 * For 50 MHz and below, events contain one sample for each channel,
822 * spread 20 ns apart.
824 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
825 uint16_t *lastsample, int triggerpos,
826 uint16_t limit_chunk, void *user_data)
828 struct sr_device_instance *sdi = user_data;
829 struct sigma *sigma = sdi->priv;
831 uint16_t samples[65536 * sigma->samples_per_event];
832 struct sr_datafeed_packet packet;
833 int i, j, k, l, numpad, tosend;
834 size_t n = 0, sent = 0;
835 int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event;
840 /* Check if trigger is in this chunk. */
841 if (triggerpos != -1) {
842 if (sigma->cur_samplerate <= MHZ(50))
843 triggerpos -= EVENTS_PER_CLUSTER - 1;
848 /* Find in which cluster the trigger occured. */
849 triggerts = triggerpos / 7;
853 for (i = 0; i < 64; ++i) {
854 ts = *(uint16_t *) &buf[i * 16];
855 tsdiff = ts - *lastts;
858 /* Decode partial chunk. */
859 if (limit_chunk && ts > limit_chunk)
862 /* Pad last sample up to current point. */
863 numpad = tsdiff * sigma->samples_per_event - clustersize;
865 for (j = 0; j < numpad; ++j)
866 samples[j] = *lastsample;
871 /* Send samples between previous and this timestamp to sigrok. */
874 tosend = MIN(2048, n - sent);
876 packet.type = SR_DF_LOGIC;
877 packet.length = tosend * sizeof(uint16_t);
879 packet.payload = samples + sent;
880 session_bus(sigma->session_id, &packet);
886 event = (uint16_t *) &buf[i * 16 + 2];
889 /* For each event in cluster. */
890 for (j = 0; j < 7; ++j) {
892 /* For each sample in event. */
893 for (k = 0; k < sigma->samples_per_event; ++k) {
896 /* For each probe. */
897 for (l = 0; l < sigma->num_probes; ++l)
898 cur_sample |= (!!(event[j] & (1 << (l *
899 sigma->samples_per_event
903 samples[n++] = cur_sample;
907 /* Send data up to trigger point (if triggered). */
909 if (i == triggerts) {
911 * Trigger is not always accurate to sample because of
912 * pipeline delay. However, it always triggers before
913 * the actual event. We therefore look at the next
914 * samples to pinpoint the exact position of the trigger.
916 tosend = get_trigger_offset(samples, *lastsample,
920 packet.type = SR_DF_LOGIC;
921 packet.length = tosend * sizeof(uint16_t);
923 packet.payload = samples;
924 session_bus(sigma->session_id, &packet);
929 /* Only send trigger if explicitly enabled. */
930 if (sigma->use_triggers) {
931 packet.type = SR_DF_TRIGGER;
934 session_bus(sigma->session_id, &packet);
938 /* Send rest of the chunk to sigrok. */
942 packet.type = SR_DF_LOGIC;
943 packet.length = tosend * sizeof(uint16_t);
945 packet.payload = samples + sent;
946 session_bus(sigma->session_id, &packet);
949 *lastsample = samples[n - 1];
955 static int receive_data(int fd, int revents, void *user_data)
957 struct sr_device_instance *sdi = user_data;
958 struct sigma *sigma = sdi->priv;
959 struct sr_datafeed_packet packet;
960 const int chunks_per_read = 32;
961 unsigned char buf[chunks_per_read * CHUNK_SIZE];
962 int bufsz, numchunks, i, newchunks;
963 uint64_t running_msec;
969 numchunks = (sigma->state.stoppos + 511) / 512;
971 if (sigma->state.state == SIGMA_IDLE)
974 if (sigma->state.state == SIGMA_CAPTURE) {
976 /* Check if the timer has expired, or memory is full. */
977 gettimeofday(&tv, 0);
978 running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 +
979 (tv.tv_usec - sigma->start_tv.tv_usec) / 1000;
981 if (running_msec < sigma->limit_msec && numchunks < 32767)
984 hw_stop_acquisition(sdi->index, user_data);
988 } else if (sigma->state.state == SIGMA_DOWNLOAD) {
989 if (sigma->state.chunks_downloaded >= numchunks) {
990 /* End of samples. */
991 packet.type = SR_DF_END;
993 session_bus(sigma->session_id, &packet);
995 sigma->state.state = SIGMA_IDLE;
1000 newchunks = MIN(chunks_per_read,
1001 numchunks - sigma->state.chunks_downloaded);
1003 g_message("Downloading sample data: %.0f %%",
1004 100.0 * sigma->state.chunks_downloaded / numchunks);
1006 bufsz = sigma_read_dram(sigma->state.chunks_downloaded,
1007 newchunks, buf, sigma);
1009 /* Find first ts. */
1010 if (sigma->state.chunks_downloaded == 0) {
1011 sigma->state.lastts = *(uint16_t *) buf - 1;
1012 sigma->state.lastsample = 0;
1015 /* Decode chunks and send them to sigrok. */
1016 for (i = 0; i < newchunks; ++i) {
1017 int limit_chunk = 0;
1019 /* The last chunk may potentially be only in part. */
1020 if (sigma->state.chunks_downloaded == numchunks - 1)
1022 /* Find the last valid timestamp */
1023 limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts;
1026 if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk)
1027 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1028 &sigma->state.lastts,
1029 &sigma->state.lastsample,
1030 sigma->state.triggerpos & 0x1ff,
1031 limit_chunk, user_data);
1033 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1034 &sigma->state.lastts,
1035 &sigma->state.lastsample,
1036 -1, limit_chunk, user_data);
1038 ++sigma->state.chunks_downloaded;
1045 /* Build a LUT entry used by the trigger functions. */
1046 static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
1050 /* For each quad probe. */
1051 for (i = 0; i < 4; ++i) {
1054 /* For each bit in LUT. */
1055 for (j = 0; j < 16; ++j)
1057 /* For each probe in quad. */
1058 for (k = 0; k < 4; ++k) {
1059 bit = 1 << (i * 4 + k);
1061 /* Set bit in entry */
1063 ((!(value & bit)) !=
1065 entry[i] &= ~(1 << j);
1070 /* Add a logical function to LUT mask. */
1071 static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
1072 int index, int neg, uint16_t *mask)
1075 int x[2][2], tmp, a, b, aset, bset, rset;
1077 memset(x, 0, 4 * sizeof(int));
1079 /* Trigger detect condition. */
1109 case OP_NOTRISEFALL:
1115 /* Transpose if neg is set. */
1117 for (i = 0; i < 2; ++i)
1118 for (j = 0; j < 2; ++j) {
1120 x[i][j] = x[1-i][1-j];
1125 /* Update mask with function. */
1126 for (i = 0; i < 16; ++i) {
1127 a = (i >> (2 * index + 0)) & 1;
1128 b = (i >> (2 * index + 1)) & 1;
1130 aset = (*mask >> i) & 1;
1133 if (func == FUNC_AND || func == FUNC_NAND)
1135 else if (func == FUNC_OR || func == FUNC_NOR)
1137 else if (func == FUNC_XOR || func == FUNC_NXOR)
1140 if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
1151 * Build trigger LUTs used by 50 MHz and lower sample rates for supporting
1152 * simple pin change and state triggers. Only two transitions (rise/fall) can be
1153 * set at any time, but a full mask and value can be set (0/1).
1155 static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma)
1158 uint16_t masks[2] = { 0, 0 };
1160 memset(lut, 0, sizeof(struct triggerlut));
1162 /* Contant for simple triggers. */
1165 /* Value/mask trigger support. */
1166 build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask,
1169 /* Rise/fall trigger support. */
1170 for (i = 0, j = 0; i < 16; ++i) {
1171 if (sigma->trigger.risingmask & (1 << i) ||
1172 sigma->trigger.fallingmask & (1 << i))
1173 masks[j++] = 1 << i;
1176 build_lut_entry(masks[0], masks[0], lut->m0d);
1177 build_lut_entry(masks[1], masks[1], lut->m1d);
1179 /* Add glue logic */
1180 if (masks[0] || masks[1]) {
1181 /* Transition trigger. */
1182 if (masks[0] & sigma->trigger.risingmask)
1183 add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
1184 if (masks[0] & sigma->trigger.fallingmask)
1185 add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
1186 if (masks[1] & sigma->trigger.risingmask)
1187 add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
1188 if (masks[1] & sigma->trigger.fallingmask)
1189 add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
1191 /* Only value/mask trigger. */
1195 /* Triggertype: event. */
1196 lut->params.selres = 3;
1201 static int hw_start_acquisition(int device_index, gpointer session_device_id)
1203 struct sr_device_instance *sdi;
1204 struct sigma *sigma;
1205 struct sr_datafeed_packet packet;
1206 struct sr_datafeed_header header;
1207 struct clockselect_50 clockselect;
1209 uint8_t triggerselect;
1210 struct triggerinout triggerinout_conf;
1211 struct triggerlut lut;
1214 session_device_id = session_device_id;
1216 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
1221 /* If the samplerate has not been set, default to 200 KHz. */
1222 if (sigma->cur_firmware == -1)
1223 set_samplerate(sdi, KHZ(200));
1225 /* Enter trigger programming mode. */
1226 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma);
1228 /* 100 and 200 MHz mode. */
1229 if (sigma->cur_samplerate >= MHZ(100)) {
1230 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma);
1232 /* Find which pin to trigger on from mask. */
1233 for (triggerpin = 0; triggerpin < 8; ++triggerpin)
1234 if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) &
1238 /* Set trigger pin and light LED on trigger. */
1239 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
1241 /* Default rising edge. */
1242 if (sigma->trigger.fallingmask)
1243 triggerselect |= 1 << 3;
1245 /* All other modes. */
1246 } else if (sigma->cur_samplerate <= MHZ(50)) {
1247 build_basic_trigger(&lut, sigma);
1249 sigma_write_trigger_lut(&lut, sigma);
1251 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
1254 /* Setup trigger in and out pins to default values. */
1255 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
1256 triggerinout_conf.trgout_bytrigger = 1;
1257 triggerinout_conf.trgout_enable = 1;
1259 sigma_write_register(WRITE_TRIGGER_OPTION,
1260 (uint8_t *) &triggerinout_conf,
1261 sizeof(struct triggerinout), sigma);
1263 /* Go back to normal mode. */
1264 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma);
1266 /* Set clock select register. */
1267 if (sigma->cur_samplerate == MHZ(200))
1268 /* Enable 4 probes. */
1269 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma);
1270 else if (sigma->cur_samplerate == MHZ(100))
1271 /* Enable 8 probes. */
1272 sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma);
1275 * 50 MHz mode (or fraction thereof). Any fraction down to
1276 * 50 MHz / 256 can be used, but is not supported by sigrok API.
1278 frac = MHZ(50) / sigma->cur_samplerate - 1;
1280 clockselect.async = 0;
1281 clockselect.fraction = frac;
1282 clockselect.disabled_probes = 0;
1284 sigma_write_register(WRITE_CLOCK_SELECT,
1285 (uint8_t *) &clockselect,
1286 sizeof(clockselect), sigma);
1289 /* Setup maximum post trigger time. */
1290 sigma_set_register(WRITE_POST_TRIGGER,
1291 (sigma->capture_ratio * 255) / 100, sigma);
1293 /* Start acqusition. */
1294 gettimeofday(&sigma->start_tv, 0);
1295 sigma_set_register(WRITE_MODE, 0x0d, sigma);
1297 sigma->session_id = session_device_id;
1299 /* Send header packet to the session bus. */
1300 packet.type = SR_DF_HEADER;
1301 packet.length = sizeof(struct sr_datafeed_header);
1302 packet.payload = &header;
1303 header.feed_version = 1;
1304 gettimeofday(&header.starttime, NULL);
1305 header.samplerate = sigma->cur_samplerate;
1306 header.protocol_id = SR_PROTO_RAW;
1307 header.num_logic_probes = sigma->num_probes;
1308 header.num_analog_probes = 0;
1309 session_bus(session_device_id, &packet);
1311 /* Add capture source. */
1312 source_add(0, G_IO_IN, 10, receive_data, sdi);
1314 sigma->state.state = SIGMA_CAPTURE;
1319 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
1321 struct sr_device_instance *sdi;
1322 struct sigma *sigma;
1325 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
1330 session_device_id = session_device_id;
1332 /* Stop acquisition. */
1333 sigma_set_register(WRITE_MODE, 0x11, sigma);
1335 /* Set SDRAM Read Enable. */
1336 sigma_set_register(WRITE_MODE, 0x02, sigma);
1338 /* Get the current position. */
1339 sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma);
1341 /* Check if trigger has fired. */
1342 modestatus = sigma_get_register(READ_MODE, sigma);
1343 if (modestatus & 0x20) {
1344 sigma->state.triggerchunk = sigma->state.triggerpos / 512;
1347 sigma->state.triggerchunk = -1;
1349 sigma->state.chunks_downloaded = 0;
1351 sigma->state.state = SIGMA_DOWNLOAD;
1354 struct sr_device_plugin asix_sigma_plugin_info = {
1364 hw_get_capabilities,
1365 hw_set_configuration,
1366 hw_start_acquisition,
1367 hw_stop_acquisition,