2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX Sigma Logic Analyzer Driver
30 #include "asix-sigma.h"
32 #define USB_VENDOR 0xa600
33 #define USB_PRODUCT 0xa000
34 #define USB_DESCRIPTION "ASIX SIGMA"
35 #define USB_VENDOR_NAME "ASIX"
36 #define USB_MODEL_NAME "SIGMA"
37 #define USB_MODEL_VERSION ""
38 #define TRIGGER_TYPES "rf10"
40 static GSList *device_instances = NULL;
42 static uint64_t supported_samplerates[] = {
56 static struct samplerates samplerates = {
60 supported_samplerates,
63 static int capabilities[] = {
73 /* Force the FPGA to reboot. */
74 static uint8_t suicide[] = {
75 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
78 /* Prepare to upload firmware (FPGA specific). */
79 static uint8_t init[] = {
80 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
83 /* Initialize the logic analyzer mode. */
84 static uint8_t logic_mode_start[] = {
85 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
86 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
89 static const char *firmware_files[] = {
90 "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
91 "asix-sigma-100.fw", /* 100 MHz */
92 "asix-sigma-200.fw", /* 200 MHz */
93 "asix-sigma-50sync.fw", /* Synchronous clock from pin */
94 "asix-sigma-phasor.fw", /* Frequency counter */
97 static void hw_stop_acquisition(int device_index, gpointer session_device_id);
99 static int sigma_read(void *buf, size_t size, struct sigma *sigma)
103 ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size);
105 g_warning("ftdi_read_data failed: %s",
106 ftdi_get_error_string(&sigma->ftdic));
112 static int sigma_write(void *buf, size_t size, struct sigma *sigma)
116 ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size);
118 g_warning("ftdi_write_data failed: %s",
119 ftdi_get_error_string(&sigma->ftdic));
120 } else if ((size_t) ret != size) {
121 g_warning("ftdi_write_data did not complete write\n");
127 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
131 uint8_t buf[len + 2];
134 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
135 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
137 for (i = 0; i < len; ++i) {
138 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
139 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
142 return sigma_write(buf, idx, sigma);
145 static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma)
147 return sigma_write_register(reg, &value, 1, sigma);
150 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len,
155 buf[0] = REG_ADDR_LOW | (reg & 0xf);
156 buf[1] = REG_ADDR_HIGH | (reg >> 4);
157 buf[2] = REG_READ_ADDR;
159 sigma_write(buf, sizeof(buf), sigma);
161 return sigma_read(data, len, sigma);
164 static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma)
168 if (1 != sigma_read_register(reg, &value, 1, sigma)) {
169 g_warning("Sigma_get_register: 1 byte expected");
176 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos,
180 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
182 REG_READ_ADDR | NEXT_REG,
183 REG_READ_ADDR | NEXT_REG,
184 REG_READ_ADDR | NEXT_REG,
185 REG_READ_ADDR | NEXT_REG,
186 REG_READ_ADDR | NEXT_REG,
187 REG_READ_ADDR | NEXT_REG,
191 sigma_write(buf, sizeof(buf), sigma);
193 sigma_read(result, sizeof(result), sigma);
195 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
196 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
198 /* Not really sure why this must be done, but according to spec. */
199 if ((--*stoppos & 0x1ff) == 0x1ff)
202 if ((*--triggerpos & 0x1ff) == 0x1ff)
208 static int sigma_read_dram(uint16_t startchunk, size_t numchunks,
209 uint8_t *data, struct sigma *sigma)
215 /* Send the startchunk. Index start with 1. */
216 buf[0] = startchunk >> 8;
217 buf[1] = startchunk & 0xff;
218 sigma_write_register(WRITE_MEMROW, buf, 2, sigma);
221 buf[idx++] = REG_DRAM_BLOCK;
222 buf[idx++] = REG_DRAM_WAIT_ACK;
224 for (i = 0; i < numchunks; ++i) {
225 /* Alternate bit to copy from DRAM to cache. */
226 if (i != (numchunks - 1))
227 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
229 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
231 if (i != (numchunks - 1))
232 buf[idx++] = REG_DRAM_WAIT_ACK;
235 sigma_write(buf, idx, sigma);
237 return sigma_read(data, numchunks * CHUNK_SIZE, sigma);
240 /* Upload trigger look-up tables to Sigma. */
241 static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma)
247 /* Transpose the table and send to Sigma. */
248 for (i = 0; i < 16; ++i) {
253 if (lut->m2d[0] & bit)
255 if (lut->m2d[1] & bit)
257 if (lut->m2d[2] & bit)
259 if (lut->m2d[3] & bit)
269 if (lut->m0d[0] & bit)
271 if (lut->m0d[1] & bit)
273 if (lut->m0d[2] & bit)
275 if (lut->m0d[3] & bit)
278 if (lut->m1d[0] & bit)
280 if (lut->m1d[1] & bit)
282 if (lut->m1d[2] & bit)
284 if (lut->m1d[3] & bit)
287 sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp),
289 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma);
292 /* Send the parameters */
293 sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
294 sizeof(lut->params), sigma);
299 /* Generate the bitbang stream for programming the FPGA. */
300 static int bin2bitbang(const char *filename,
301 unsigned char **buf, size_t *buf_size)
305 unsigned long offset = 0;
307 uint8_t *compressed_buf, *firmware;
308 uLongf csize, fwsize;
309 const int buffer_size = 65536;
312 uint32_t imm = 0x3f6df2ab;
314 f = fopen(filename, "r");
316 g_warning("fopen(\"%s\", \"r\")", filename);
320 if (-1 == fseek(f, 0, SEEK_END)) {
321 g_warning("fseek on %s failed", filename);
326 file_size = ftell(f);
328 fseek(f, 0, SEEK_SET);
330 compressed_buf = g_malloc(file_size);
331 firmware = g_malloc(buffer_size);
333 if (!compressed_buf || !firmware) {
334 g_warning("Error allocating buffers");
339 while ((c = getc(f)) != EOF) {
340 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
341 compressed_buf[csize++] = c ^ imm;
345 fwsize = buffer_size;
346 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
348 g_free(compressed_buf);
350 g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
354 g_free(compressed_buf);
356 *buf_size = fwsize * 2 * 8;
358 *buf = p = (unsigned char *)g_malloc(*buf_size);
361 g_warning("Error allocating buffers");
365 for (i = 0; i < fwsize; ++i) {
366 for (bit = 7; bit >= 0; --bit) {
367 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
368 p[offset++] = v | 0x01;
375 if (offset != *buf_size) {
377 g_warning("Error reading firmware %s "
378 "offset=%ld, file_size=%ld, buf_size=%zd\n",
379 filename, offset, file_size, *buf_size);
387 static int hw_init(char *deviceinfo)
389 struct sigrok_device_instance *sdi;
390 struct sigma *sigma = g_malloc(sizeof(struct sigma));
392 deviceinfo = deviceinfo;
397 ftdi_init(&sigma->ftdic);
399 /* Look for SIGMAs. */
400 if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT,
401 USB_DESCRIPTION, NULL) < 0)
404 sigma->cur_samplerate = 0;
405 sigma->limit_msec = 0;
406 sigma->cur_firmware = -1;
407 sigma->num_probes = 0;
408 sigma->samples_per_event = 0;
409 sigma->capture_ratio = 50;
410 sigma->use_triggers = 0;
412 /* Register SIGMA device. */
413 sdi = sigrok_device_instance_new(0, ST_INITIALIZING,
414 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
420 device_instances = g_slist_append(device_instances, sdi);
422 /* We will open the device again when we need it. */
423 ftdi_usb_close(&sigma->ftdic);
431 static int upload_firmware(int firmware_idx, struct sigma *sigma)
437 unsigned char result[32];
438 char firmware_path[128];
440 /* Make sure it's an ASIX SIGMA. */
441 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
442 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
443 g_warning("ftdi_usb_open failed: %s",
444 ftdi_get_error_string(&sigma->ftdic));
448 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
449 g_warning("ftdi_set_bitmode failed: %s",
450 ftdi_get_error_string(&sigma->ftdic));
454 /* Four times the speed of sigmalogan - Works well. */
455 if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) {
456 g_warning("ftdi_set_baudrate failed: %s",
457 ftdi_get_error_string(&sigma->ftdic));
461 /* Force the FPGA to reboot. */
462 sigma_write(suicide, sizeof(suicide), sigma);
463 sigma_write(suicide, sizeof(suicide), sigma);
464 sigma_write(suicide, sizeof(suicide), sigma);
465 sigma_write(suicide, sizeof(suicide), sigma);
467 /* Prepare to upload firmware (FPGA specific). */
468 sigma_write(init, sizeof(init), sigma);
470 ftdi_usb_purge_buffers(&sigma->ftdic);
472 /* Wait until the FPGA asserts INIT_B. */
474 ret = sigma_read(result, 1, sigma);
475 if (result[0] & 0x20)
479 /* Prepare firmware. */
480 snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
481 firmware_files[firmware_idx]);
483 if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) {
484 g_warning("An error occured while reading the firmware: %s",
489 /* Upload firmare. */
490 sigma_write(buf, buf_size, sigma);
494 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) {
495 g_warning("ftdi_set_bitmode failed: %s",
496 ftdi_get_error_string(&sigma->ftdic));
500 ftdi_usb_purge_buffers(&sigma->ftdic);
502 /* Discard garbage. */
503 while (1 == sigma_read(&pins, 1, sigma))
506 /* Initialize the logic analyzer mode. */
507 sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma);
509 /* Expect a 3 byte reply. */
510 ret = sigma_read(result, 3, sigma);
512 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
513 g_warning("Configuration failed. Invalid reply received.");
517 sigma->cur_firmware = firmware_idx;
522 static int hw_opendev(int device_index)
524 struct sigrok_device_instance *sdi;
528 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
533 /* Make sure it's an ASIX SIGMA. */
534 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
535 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
537 g_warning("ftdi_usb_open failed: %s",
538 ftdi_get_error_string(&sigma->ftdic));
543 sdi->status = ST_ACTIVE;
548 static int set_samplerate(struct sigrok_device_instance *sdi,
552 struct sigma *sigma = sdi->priv;
554 for (i = 0; supported_samplerates[i]; i++) {
555 if (supported_samplerates[i] == samplerate)
558 if (supported_samplerates[i] == 0)
559 return SIGROK_ERR_SAMPLERATE;
561 if (samplerate <= MHZ(50)) {
562 ret = upload_firmware(0, sigma);
563 sigma->num_probes = 16;
565 if (samplerate == MHZ(100)) {
566 ret = upload_firmware(1, sigma);
567 sigma->num_probes = 8;
569 else if (samplerate == MHZ(200)) {
570 ret = upload_firmware(2, sigma);
571 sigma->num_probes = 4;
574 sigma->cur_samplerate = samplerate;
575 sigma->samples_per_event = 16 / sigma->num_probes;
576 sigma->state.state = SIGMA_IDLE;
578 g_message("Firmware uploaded");
584 * In 100 and 200 MHz mode, only a single pin rising/falling can be
585 * set as trigger. In other modes, two rising/falling triggers can be set,
586 * in addition to value/mask trigger for any number of probes.
588 * The Sigma supports complex triggers using boolean expressions, but this
589 * has not been implemented yet.
591 static int configure_probes(struct sigrok_device_instance *sdi, GSList *probes)
593 struct sigma *sigma = sdi->priv;
599 memset(&sigma->trigger, 0, sizeof(struct sigma_trigger));
601 for (l = probes; l; l = l->next) {
602 probe = (struct probe *)l->data;
603 probebit = 1 << (probe->index - 1);
605 if (!probe->enabled || !probe->trigger)
608 if (sigma->cur_samplerate >= MHZ(100)) {
609 /* Fast trigger support. */
611 g_warning("Asix Sigma only supports a single "
612 "pin trigger in 100 and 200 "
616 if (probe->trigger[0] == 'f')
617 sigma->trigger.fallingmask |= probebit;
618 else if (probe->trigger[0] == 'r')
619 sigma->trigger.risingmask |= probebit;
621 g_warning("Asix Sigma only supports "
622 "rising/falling trigger in 100 "
623 "and 200 MHz mode.");
629 /* Simple trigger support (event). */
630 if (probe->trigger[0] == '1') {
631 sigma->trigger.simplevalue |= probebit;
632 sigma->trigger.simplemask |= probebit;
634 else if (probe->trigger[0] == '0') {
635 sigma->trigger.simplevalue &= ~probebit;
636 sigma->trigger.simplemask |= probebit;
638 else if (probe->trigger[0] == 'f') {
639 sigma->trigger.fallingmask |= probebit;
642 else if (probe->trigger[0] == 'r') {
643 sigma->trigger.risingmask |= probebit;
648 * Actually, Sigma supports 2 rising/falling triggers,
649 * but they are ORed and the current trigger syntax
650 * does not permit ORed triggers.
652 if (trigger_set > 1) {
653 g_warning("Asix Sigma only supports 1 rising/"
654 "falling triggers.");
660 sigma->use_triggers = 1;
666 static void hw_closedev(int device_index)
668 struct sigrok_device_instance *sdi;
671 if ((sdi = get_sigrok_device_instance(device_instances, device_index)))
674 if (sdi->status == ST_ACTIVE)
675 ftdi_usb_close(&sigma->ftdic);
677 sdi->status = ST_INACTIVE;
681 static void hw_cleanup(void)
684 struct sigrok_device_instance *sdi;
686 /* Properly close all devices. */
687 for (l = device_instances; l; l = l->next) {
689 if (sdi->priv != NULL)
691 sigrok_device_instance_free(sdi);
693 g_slist_free(device_instances);
694 device_instances = NULL;
697 static void *hw_get_device_info(int device_index, int device_info_id)
699 struct sigrok_device_instance *sdi;
703 if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) {
704 fprintf(stderr, "It's NULL.\n");
710 switch (device_info_id) {
715 info = GINT_TO_POINTER(16);
720 case DI_TRIGGER_TYPES:
721 info = (char *)TRIGGER_TYPES;
723 case DI_CUR_SAMPLERATE:
724 info = &sigma->cur_samplerate;
731 static int hw_get_status(int device_index)
733 struct sigrok_device_instance *sdi;
735 sdi = get_sigrok_device_instance(device_instances, device_index);
742 static int *hw_get_capabilities(void)
747 static int hw_set_configuration(int device_index, int capability, void *value)
749 struct sigrok_device_instance *sdi;
753 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
758 if (capability == HWCAP_SAMPLERATE) {
759 ret = set_samplerate(sdi, *(uint64_t*) value);
760 } else if (capability == HWCAP_PROBECONFIG) {
761 ret = configure_probes(sdi, value);
762 } else if (capability == HWCAP_LIMIT_MSEC) {
763 sigma->limit_msec = *(uint64_t*) value;
764 if (sigma->limit_msec > 0)
768 } else if (capability == HWCAP_CAPTURE_RATIO) {
769 sigma->capture_ratio = *(uint64_t*) value;
770 if (sigma->capture_ratio < 0 || sigma->capture_ratio > 100)
781 /* Software trigger to determine exact trigger position. */
782 static int get_trigger_offset(uint16_t *samples, uint16_t last_sample,
783 struct sigma_trigger *t)
787 for (i = 0; i < 8; ++i) {
789 last_sample = samples[i-1];
791 /* Simple triggers. */
792 if ((samples[i] & t->simplemask) != t->simplevalue)
796 if ((last_sample & t->risingmask) != 0 || (samples[i] &
797 t->risingmask) != t->risingmask)
801 if ((last_sample & t->fallingmask) != t->fallingmask ||
802 (samples[i] & t->fallingmask) != 0)
808 /* If we did not match, return original trigger pos. */
813 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
814 * Each event is 20ns apart, and can contain multiple samples.
816 * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart.
817 * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart.
818 * For 50 MHz and below, events contain one sample for each channel,
819 * spread 20 ns apart.
821 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
822 uint16_t *lastsample, int triggerpos,
823 uint16_t limit_chunk, void *user_data)
825 struct sigrok_device_instance *sdi = user_data;
826 struct sigma *sigma = sdi->priv;
828 uint16_t samples[65536 * sigma->samples_per_event];
829 struct datafeed_packet packet;
830 int i, j, k, l, numpad, tosend;
831 size_t n = 0, sent = 0;
832 int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event;
837 /* Check if trigger is in this chunk. */
838 if (triggerpos != -1) {
839 if (sigma->cur_samplerate <= MHZ(50))
840 triggerpos -= EVENTS_PER_CLUSTER - 1;
845 /* Find in which cluster the trigger occured. */
846 triggerts = triggerpos / 7;
850 for (i = 0; i < 64; ++i) {
851 ts = *(uint16_t *) &buf[i * 16];
852 tsdiff = ts - *lastts;
855 /* Decode partial chunk. */
856 if (limit_chunk && ts > limit_chunk)
859 /* Pad last sample up to current point. */
860 numpad = tsdiff * sigma->samples_per_event - clustersize;
862 for (j = 0; j < numpad; ++j)
863 samples[j] = *lastsample;
868 /* Send samples between previous and this timestamp to sigrok. */
871 tosend = MIN(2048, n - sent);
873 packet.type = DF_LOGIC;
874 packet.length = tosend * sizeof(uint16_t);
876 packet.payload = samples + sent;
877 session_bus(sigma->session_id, &packet);
883 event = (uint16_t *) &buf[i * 16 + 2];
886 /* For each event in cluster. */
887 for (j = 0; j < 7; ++j) {
889 /* For each sample in event. */
890 for (k = 0; k < sigma->samples_per_event; ++k) {
893 /* For each probe. */
894 for (l = 0; l < sigma->num_probes; ++l)
895 cur_sample |= (!!(event[j] & (1 << (l *
896 sigma->samples_per_event
900 samples[n++] = cur_sample;
904 /* Send data up to trigger point (if triggered). */
906 if (i == triggerts) {
908 * Trigger is not always accurate to sample because of
909 * pipeline delay. However, it always triggers before
910 * the actual event. We therefore look at the next
911 * samples to pinpoint the exact position of the trigger.
913 tosend = get_trigger_offset(samples, *lastsample,
917 packet.type = DF_LOGIC;
918 packet.length = tosend * sizeof(uint16_t);
920 packet.payload = samples;
921 session_bus(sigma->session_id, &packet);
926 /* Only send trigger if explicitly enabled. */
927 if (sigma->use_triggers) {
928 packet.type = DF_TRIGGER;
931 session_bus(sigma->session_id, &packet);
935 /* Send rest of the chunk to sigrok. */
939 packet.type = DF_LOGIC;
940 packet.length = tosend * sizeof(uint16_t);
942 packet.payload = samples + sent;
943 session_bus(sigma->session_id, &packet);
946 *lastsample = samples[n - 1];
952 static int receive_data(int fd, int revents, void *user_data)
954 struct sigrok_device_instance *sdi = user_data;
955 struct sigma *sigma = sdi->priv;
956 struct datafeed_packet packet;
957 const int chunks_per_read = 32;
958 unsigned char buf[chunks_per_read * CHUNK_SIZE];
959 int bufsz, numchunks, i, newchunks;
960 uint64_t running_msec;
966 numchunks = (sigma->state.stoppos + 511) / 512;
968 if (sigma->state.state == SIGMA_IDLE)
971 if (sigma->state.state == SIGMA_CAPTURE) {
973 /* Check if the timer has expired, or memory is full. */
974 gettimeofday(&tv, 0);
975 running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 +
976 (tv.tv_usec - sigma->start_tv.tv_usec) / 1000;
978 if (running_msec < sigma->limit_msec && numchunks < 32767)
981 hw_stop_acquisition(sdi->index, user_data);
985 } else if (sigma->state.state == SIGMA_DOWNLOAD) {
986 if (sigma->state.chunks_downloaded >= numchunks) {
987 /* End of samples. */
988 packet.type = DF_END;
990 session_bus(sigma->session_id, &packet);
992 sigma->state.state = SIGMA_IDLE;
997 newchunks = MIN(chunks_per_read,
998 numchunks - sigma->state.chunks_downloaded);
1000 g_message("Downloading sample data: %.0f %%",
1001 100.0 * sigma->state.chunks_downloaded / numchunks);
1003 bufsz = sigma_read_dram(sigma->state.chunks_downloaded,
1004 newchunks, buf, sigma);
1006 /* Find first ts. */
1007 if (sigma->state.chunks_downloaded == 0) {
1008 sigma->state.lastts = *(uint16_t *) buf - 1;
1009 sigma->state.lastsample = 0;
1012 /* Decode chunks and send them to sigrok. */
1013 for (i = 0; i < newchunks; ++i) {
1014 int limit_chunk = 0;
1016 /* The last chunk may potentially be only in part. */
1017 if (sigma->state.chunks_downloaded == numchunks - 1)
1019 /* Find the last valid timestamp */
1020 limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts;
1023 if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk)
1024 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1025 &sigma->state.lastts,
1026 &sigma->state.lastsample,
1027 sigma->state.triggerpos & 0x1ff,
1028 limit_chunk, user_data);
1030 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1031 &sigma->state.lastts,
1032 &sigma->state.lastsample,
1033 -1, limit_chunk, user_data);
1035 ++sigma->state.chunks_downloaded;
1042 /* Build a LUT entry used by the trigger functions. */
1043 static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
1047 /* For each quad probe. */
1048 for (i = 0; i < 4; ++i) {
1051 /* For each bit in LUT. */
1052 for (j = 0; j < 16; ++j)
1054 /* For each probe in quad. */
1055 for (k = 0; k < 4; ++k) {
1056 bit = 1 << (i * 4 + k);
1058 /* Set bit in entry */
1060 ((!(value & bit)) !=
1062 entry[i] &= ~(1 << j);
1067 /* Add a logical function to LUT mask. */
1068 static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
1069 int index, int neg, uint16_t *mask)
1072 int x[2][2], tmp, a, b, aset, bset, rset;
1074 memset(x, 0, 4 * sizeof(int));
1076 /* Trigger detect condition. */
1106 case OP_NOTRISEFALL:
1112 /* Transpose if neg is set. */
1114 for (i = 0; i < 2; ++i)
1115 for (j = 0; j < 2; ++j) {
1117 x[i][j] = x[1-i][1-j];
1122 /* Update mask with function. */
1123 for (i = 0; i < 16; ++i) {
1124 a = (i >> (2 * index + 0)) & 1;
1125 b = (i >> (2 * index + 1)) & 1;
1127 aset = (*mask >> i) & 1;
1130 if (func == FUNC_AND || func == FUNC_NAND)
1132 else if (func == FUNC_OR || func == FUNC_NOR)
1134 else if (func == FUNC_XOR || func == FUNC_NXOR)
1137 if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
1148 * Build trigger LUTs used by 50 MHz and lower sample rates for supporting
1149 * simple pin change and state triggers. Only two transitions (rise/fall) can be
1150 * set at any time, but a full mask and value can be set (0/1).
1152 static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma)
1155 uint16_t masks[2] = { 0, 0 };
1157 memset(lut, 0, sizeof(struct triggerlut));
1159 /* Contant for simple triggers. */
1162 /* Value/mask trigger support. */
1163 build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask,
1166 /* Rise/fall trigger support. */
1167 for (i = 0, j = 0; i < 16; ++i) {
1168 if (sigma->trigger.risingmask & (1 << i) ||
1169 sigma->trigger.fallingmask & (1 << i))
1170 masks[j++] = 1 << i;
1173 build_lut_entry(masks[0], masks[0], lut->m0d);
1174 build_lut_entry(masks[1], masks[1], lut->m1d);
1176 /* Add glue logic */
1177 if (masks[0] || masks[1]) {
1178 /* Transition trigger. */
1179 if (masks[0] & sigma->trigger.risingmask)
1180 add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
1181 if (masks[0] & sigma->trigger.fallingmask)
1182 add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
1183 if (masks[1] & sigma->trigger.risingmask)
1184 add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
1185 if (masks[1] & sigma->trigger.fallingmask)
1186 add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
1188 /* Only value/mask trigger. */
1192 /* Triggertype: event. */
1193 lut->params.selres = 3;
1198 static int hw_start_acquisition(int device_index, gpointer session_device_id)
1200 struct sigrok_device_instance *sdi;
1201 struct sigma *sigma;
1202 struct datafeed_packet packet;
1203 struct datafeed_header header;
1204 struct clockselect_50 clockselect;
1206 uint8_t triggerselect;
1207 struct triggerinout triggerinout_conf;
1208 struct triggerlut lut;
1211 session_device_id = session_device_id;
1213 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
1218 /* If the samplerate has not been set, default to 200 KHz. */
1219 if (sigma->cur_firmware == -1)
1220 set_samplerate(sdi, KHZ(200));
1222 /* Enter trigger programming mode. */
1223 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma);
1225 /* 100 and 200 MHz mode. */
1226 if (sigma->cur_samplerate >= MHZ(100)) {
1227 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma);
1229 /* Find which pin to trigger on from mask. */
1230 for (triggerpin = 0; triggerpin < 8; ++triggerpin)
1231 if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) &
1235 /* Set trigger pin and light LED on trigger. */
1236 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
1238 /* Default rising edge. */
1239 if (sigma->trigger.fallingmask)
1240 triggerselect |= 1 << 3;
1242 /* All other modes. */
1243 } else if (sigma->cur_samplerate <= MHZ(50)) {
1244 build_basic_trigger(&lut, sigma);
1246 sigma_write_trigger_lut(&lut, sigma);
1248 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
1251 /* Setup trigger in and out pins to default values. */
1252 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
1253 triggerinout_conf.trgout_bytrigger = 1;
1254 triggerinout_conf.trgout_enable = 1;
1256 sigma_write_register(WRITE_TRIGGER_OPTION,
1257 (uint8_t *) &triggerinout_conf,
1258 sizeof(struct triggerinout), sigma);
1260 /* Go back to normal mode. */
1261 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma);
1263 /* Set clock select register. */
1264 if (sigma->cur_samplerate == MHZ(200))
1265 /* Enable 4 probes. */
1266 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma);
1267 else if (sigma->cur_samplerate == MHZ(100))
1268 /* Enable 8 probes. */
1269 sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma);
1272 * 50 MHz mode (or fraction thereof). Any fraction down to
1273 * 50 MHz / 256 can be used, but is not supported by sigrok API.
1275 frac = MHZ(50) / sigma->cur_samplerate - 1;
1277 clockselect.async = 0;
1278 clockselect.fraction = frac;
1279 clockselect.disabled_probes = 0;
1281 sigma_write_register(WRITE_CLOCK_SELECT,
1282 (uint8_t *) &clockselect,
1283 sizeof(clockselect), sigma);
1286 /* Setup maximum post trigger time. */
1287 sigma_set_register(WRITE_POST_TRIGGER,
1288 (sigma->capture_ratio * 255) / 100, sigma);
1290 /* Start acqusition. */
1291 gettimeofday(&sigma->start_tv, 0);
1292 sigma_set_register(WRITE_MODE, 0x0d, sigma);
1294 sigma->session_id = session_device_id;
1296 /* Send header packet to the session bus. */
1297 packet.type = DF_HEADER;
1298 packet.length = sizeof(struct datafeed_header);
1299 packet.payload = &header;
1300 header.feed_version = 1;
1301 gettimeofday(&header.starttime, NULL);
1302 header.samplerate = sigma->cur_samplerate;
1303 header.protocol_id = PROTO_RAW;
1304 header.num_logic_probes = sigma->num_probes;
1305 header.num_analog_probes = 0;
1306 session_bus(session_device_id, &packet);
1308 /* Add capture source. */
1309 source_add(0, G_IO_IN, 10, receive_data, sdi);
1311 sigma->state.state = SIGMA_CAPTURE;
1316 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
1318 struct sigrok_device_instance *sdi;
1319 struct sigma *sigma;
1322 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
1327 session_device_id = session_device_id;
1329 /* Stop acquisition. */
1330 sigma_set_register(WRITE_MODE, 0x11, sigma);
1332 /* Set SDRAM Read Enable. */
1333 sigma_set_register(WRITE_MODE, 0x02, sigma);
1335 /* Get the current position. */
1336 sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma);
1338 /* Check if trigger has fired. */
1339 modestatus = sigma_get_register(READ_MODE, sigma);
1340 if (modestatus & 0x20) {
1341 sigma->state.triggerchunk = sigma->state.triggerpos / 512;
1344 sigma->state.triggerchunk = -1;
1346 sigma->state.chunks_downloaded = 0;
1348 sigma->state.state = SIGMA_DOWNLOAD;
1351 struct device_plugin asix_sigma_plugin_info = {
1360 hw_get_capabilities,
1361 hw_set_configuration,
1362 hw_start_acquisition,
1363 hw_stop_acquisition,