2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2015 Benjamin Larsson <benjamin@southpole.se>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 import sigrokdecode as srd
23 class SamplerateError(Exception):
26 class Decoder(srd.Decoder):
30 longname = 'RFID T55xx'
31 desc = 'T55xx 100-150kHz RFID protocol.'
36 {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
39 {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000},
40 {'id': 'start_gap', 'desc': 'Start gap min', 'default': 20},
41 {'id': 'w_gap', 'desc': 'Write gap min', 'default': 20},
42 {'id': 'w_one_min', 'desc': 'Write one min', 'default': 48},
43 {'id': 'w_one_max', 'desc': 'Write one max', 'default': 63},
44 {'id': 'w_zero_min', 'desc': 'Write zero min', 'default': 16},
45 {'id': 'w_zero_max', 'desc': 'Write zero max', 'default': 31},
46 {'id': 'em4100_decode', 'desc': 'EM4100 decode', 'default': 'on',
47 'values': ('on', 'off')},
50 ('bit_value', 'Bit value'),
51 ('start_gap', 'Start gap'),
52 ('write_gap', 'Write gap'),
53 ('write_mode_exit', 'Write mode exit'),
58 ('password', 'Password'),
59 ('address', 'Address'),
60 ('bitrate', 'Bitrate'),
63 ('bits', 'Bits', (0,)),
64 ('structure', 'Structure', (1, 2, 3, 4)),
65 ('fields', 'Fields', (5, 6, 7, 8, 9)),
66 ('decode', 'Decode', (10,)),
70 self.samplerate = None
72 self.last_samplenum = None
73 self.lastlast_samplenum = None
74 self.state = 'START_GAP'
75 self.bits_pos = [[0 for col in range(3)] for row in range(70)]
76 self.br_string = ['RF/8', 'RF/16', 'RF/32', 'RF/40',
77 'RF/50', 'RF/64', 'RF/100', 'RF/128']
78 self.mod_str1 = ['Direct', 'Manchester', 'Biphase', 'Reserved']
79 self.mod_str2 = ['Direct', 'PSK1', 'PSK2', 'PSK3', 'FSK1', 'FSK2',
81 self.pskcf_str = ['RF/2', 'RF/4', 'RF/8', 'Reserved']
82 self.em4100_decode1_partial = 0
84 def metadata(self, key, value):
85 if key == srd.SRD_CONF_SAMPLERATE:
86 self.samplerate = value
87 self.field_clock = self.samplerate / self.options['coilfreq']
88 self.wzmax = self.options['w_zero_max'] * self.field_clock
89 self.wzmin = self.options['w_zero_min'] * self.field_clock
90 self.womax = self.options['w_one_max'] * self.field_clock
91 self.womin = self.options['w_one_min'] * self.field_clock
92 self.startgap = self.options['start_gap'] * self.field_clock
93 self.writegap = self.options['w_gap'] * self.field_clock
94 self.nogap = 64 * self.field_clock
97 self.out_ann = self.register(srd.OUTPUT_ANN)
99 def decode_config(self, idx):
100 safer_key = self.bits_pos[idx][0]<<3 | self.bits_pos[idx+1][0]<<2 | \
101 self.bits_pos[idx+2][0]<<1 | self.bits_pos[idx+3][0]
102 self.put(self.bits_pos[idx][1], self.bits_pos[idx+3][2], self.out_ann,
103 [10, ['Safer Key' + ': %X' % safer_key,'%X' % safer_key]])
104 bitrate = self.bits_pos[idx+11][0]<<2 | self.bits_pos[idx+12][0]<<1 | \
105 self.bits_pos[idx+13][0]
106 self.put(self.bits_pos[idx+11][1], self.bits_pos[idx+13][2],
107 self.out_ann, [10, ['Data Bit Rate: ' + \
108 self.br_string[bitrate], self.br_string[bitrate]]])
109 modulation1 = self.bits_pos[idx+15][0]<<1 | self.bits_pos[idx+16][0]
110 modulation2 = self.bits_pos[idx+17][0]<<2 | \
111 self.bits_pos[idx+18][0]<<1 | self.bits_pos[idx+19][0]
113 mod_string = self.mod_str2[modulation2]
115 mod_string = self.mod_str1[modulation1]
116 self.put(self.bits_pos[idx+15][1], self.bits_pos[idx+19][2],
117 self.out_ann, [10, ['Modulation: ' + mod_string, mod_string]])
118 psk_cf = self.bits_pos[idx+20][0]<<1 | self.bits_pos[idx+21][0]
119 self.put(self.bits_pos[idx+20][1], self.bits_pos[idx+21][2],
120 self.out_ann, [10, ['PSK-CF: ' + self.pskcf_str[psk_cf],
121 self.pskcf_str[psk_cf]]])
122 self.put(self.bits_pos[idx+22][1], self.bits_pos[idx+22][2],
123 self.out_ann, [10, ['AOR' + ': %d' % \
124 (self.bits_pos[idx+22][0]),'%d' % (self.bits_pos[idx+22][0])]])
125 maxblock = self.bits_pos[idx+24][0]<<2 | self.bits_pos[idx+25][0]<<1 | \
126 self.bits_pos[idx+26][0]
127 self.put(self.bits_pos[idx+24][1], self.bits_pos[idx+26][2],
128 self.out_ann, [10, ['Max-Block' + ': %d' % maxblock,
130 self.put(self.bits_pos[idx+27][1], self.bits_pos[idx+27][2],
131 self.out_ann, [10, ['PWD' + ': %d' % \
132 (self.bits_pos[idx+27][0]),'%d' % (self.bits_pos[idx+27][0])]])
133 self.put(self.bits_pos[idx+28][1], self.bits_pos[idx+28][2],
134 self.out_ann, [10, ['ST-sequence terminator' + ': %d' % \
135 (self.bits_pos[idx+28][0]),'%d' % (self.bits_pos[idx+28][0])]])
136 self.put(self.bits_pos[idx+31][1], self.bits_pos[idx+31][2],
137 self.out_ann, [10, ['POR delay' + ': %d' % \
138 (self.bits_pos[idx+31][0]),'%d' % (self.bits_pos[idx+31][0])]])
140 def put4bits(self, idx):
141 bits = self.bits_pos[idx][0]<<3 | self.bits_pos[idx+1][0]<<2 | \
142 self.bits_pos[idx+2][0]<<1 | self.bits_pos[idx+3][0]
143 self.put(self.bits_pos[idx][1], self.bits_pos[idx+3][2], self.out_ann,
146 def em4100_decode1(self, idx):
147 self.put(self.bits_pos[idx][1], self.bits_pos[idx+8][2], self.out_ann,
148 [10, ['EM4100 header', 'EM header', 'Header', 'H']])
150 self.put4bits(idx+14)
151 self.put4bits(idx+19)
152 self.put4bits(idx+24)
153 self.em4100_decode1_partial = self.bits_pos[idx+29][0]<<3 | \
154 self.bits_pos[idx+30][0]<<2 | self.bits_pos[idx+31][0]<<1
155 self.put(self.bits_pos[idx+29][1], self.bits_pos[idx+31][2],
156 self.out_ann, [10, ['Partial nibble']])
158 def em4100_decode2(self, idx):
159 if self.em4100_decode1_partial != 0:
160 bits = self.em4100_decode1_partial + self.bits_pos[idx][0]
161 self.put(self.bits_pos[idx][1], self.bits_pos[idx][2],
162 self.out_ann, [10, ['%X' % bits]])
163 self.em4100_decode1_partial = 0
165 self.put(self.bits_pos[idx][1], self.bits_pos[idx][2],
166 self.out_ann, [10, ['Partial nibble']])
170 self.put4bits(idx+12)
171 self.put4bits(idx+17)
172 self.put4bits(idx+22)
173 self.put(self.bits_pos[idx+27][1], self.bits_pos[idx+31][2],
174 self.out_ann, [10, ['EM4100 trailer']])
176 def get_32_bits(self, idx):
178 for i in range(0, 32):
180 retval |= self.bits_pos[i+idx][0]
183 def get_3_bits(self, idx):
184 retval = self.bits_pos[idx][0]<<2 | self.bits_pos[idx+1][0]<<1 | \
185 self.bits_pos[idx+2][0]
188 def put_fields(self):
189 if (self.bit_nr == 70):
190 self.put(self.bits_pos[0][1], self.bits_pos[1][2], self.out_ann,
191 [5, ['Opcode' + ': %d%d' % (self.bits_pos[0][0],
192 self.bits_pos[1][0]), '%d%d' % (self.bits_pos[0][0],
193 self.bits_pos[1][0])]])
194 password = self.get_32_bits(2)
195 self.put(self.bits_pos[2][1], self.bits_pos[33][2], self.out_ann,
196 [8, ['Password' + ': %X' % password, '%X' % password]])
197 self.put(self.bits_pos[34][1], self.bits_pos[34][2], self.out_ann,
198 [6, ['Lock' + ': %X' % self.bits_pos[34][0],
199 '%X' % self.bits_pos[34][0]]])
200 data = self.get_32_bits(35)
201 self.put(self.bits_pos[35][1], self.bits_pos[66][2], self.out_ann,
202 [7, ['Data' + ': %X' % data, '%X' % data]])
203 addr = self.get_3_bits(67)
204 self.put(self.bits_pos[67][1], self.bits_pos[69][2], self.out_ann,
205 [9, ['Addr' + ': %X' % addr, '%X' % addr]])
207 self.decode_config(35)
209 self.put(self.bits_pos[35][1], self.bits_pos[66][2],
210 self.out_ann, [10, ['Password' + ': %X' % data,
212 # If we are programming EM4100 data we can decode it halfway.
213 if addr == 1 and self.options['em4100_decode'] == 'on':
214 self.em4100_decode1(35)
215 if addr == 2 and self.options['em4100_decode'] == 'on':
216 self.em4100_decode2(35)
218 if (self.bit_nr == 38):
219 self.put(self.bits_pos[0][1], self.bits_pos[1][2], self.out_ann,
220 [5, ['Opcode' + ': %d%d' % (self.bits_pos[0][0],
221 self.bits_pos[1][0]), '%d%d' % (self.bits_pos[0][0],
222 self.bits_pos[1][0])]])
223 self.put(self.bits_pos[2][1], self.bits_pos[2][2], self.out_ann,
224 [6, ['Lock' + ': %X' % self.bits_pos[2][0],
225 '%X' % self.bits_pos[2][0]]])
226 data = self.get_32_bits(3)
227 self.put(self.bits_pos[3][1], self.bits_pos[34][2], self.out_ann,
228 [7, ['Data' + ': %X' % data, '%X' % data]])
229 addr = self.get_3_bits(35)
230 self.put(self.bits_pos[35][1], self.bits_pos[37][2], self.out_ann,
231 [9, ['Addr' + ': %X' % addr, '%X' % addr]])
233 self.decode_config(3)
235 self.put(self.bits_pos[3][1], self.bits_pos[34][2],
236 self.out_ann, [10, ['Password' + ': %X' % data,
238 # If we are programming EM4100 data we can decode it halfway.
239 if addr == 1 and self.options['em4100_decode'] == 'on':
240 self.em4100_decode1(3)
241 if addr == 2 and self.options['em4100_decode'] == 'on':
242 self.em4100_decode2(3)
244 if (self.bit_nr == 2):
245 self.put(self.bits_pos[0][1], self.bits_pos[1][2], self.out_ann,
246 [5, ['Opcode' + ': %d%d' % (self.bits_pos[0][0],
247 self.bits_pos[1][0]), '%d%d' % (self.bits_pos[0][0],
248 self.bits_pos[1][0])]])
251 def add_bits_pos(self, bit, bit_start, bit_end):
253 self.bits_pos[self.bit_nr][0] = bit
254 self.bits_pos[self.bit_nr][1] = bit_start
255 self.bits_pos[self.bit_nr][2] = bit_end
258 def decode(self, ss, es, data):
259 if not self.samplerate:
260 raise SamplerateError('Cannot decode without samplerate.')
261 for (self.samplenum, (pin,)) in data:
262 # Ignore identical samples early on (for performance reasons).
263 if self.oldpin == pin:
266 if self.oldpin is None:
268 self.last_samplenum = self.samplenum
269 self.lastlast_samplenum = self.samplenum
270 self.last_edge = self.samplenum
273 self.oldsamplenum = 0
274 self.last_bit_pos = 0
276 self.old_gap_start = 0
278 self.gap_detected = 0
282 if self.oldpin != pin:
283 pl = self.samplenum - self.oldsamplenum
285 samples = self.samplenum - self.last_samplenum
287 if self.state == 'WRITE_GAP':
288 if pl > self.writegap:
289 self.gap_detected = 1
290 self.put(self.last_samplenum, self.samplenum,
291 self.out_ann, [2, ['Write gap']])
292 if (self.last_samplenum-self.old_gap_end) > self.nogap:
293 self.gap_detected = 0
294 self.state = 'START_GAP'
295 self.put(self.old_gap_end, self.last_samplenum,
296 self.out_ann, [3, ['Write mode exit']])
299 if self.state == 'START_GAP':
300 if pl > self.startgap:
301 self.gap_detected = 1
302 self.put(self.last_samplenum, self.samplenum,
303 self.out_ann, [1, ['Start gap']])
304 self.state = 'WRITE_GAP'
306 if self.gap_detected == 1:
307 self.gap_detected = 0
308 if (self.last_samplenum - self.old_gap_end) > self.wzmin \
309 and (self.last_samplenum - self.old_gap_end) < self.wzmax:
310 self.put(self.old_gap_end, self.last_samplenum,
311 self.out_ann, [0, ['0']])
312 self.put(self.old_gap_end, self.last_samplenum,
313 self.out_ann, [4, ['Bit']])
314 self.add_bits_pos(0, self.old_gap_end,
316 if (self.last_samplenum - self.old_gap_end) > self.womin \
317 and (self.last_samplenum - self.old_gap_end) < self.womax:
318 self.put(self.old_gap_end, self.last_samplenum,
319 self.out_ann, [0, ['1']])
320 self.put(self.old_gap_end, self.last_samplenum,
321 self.out_ann, [4, ['Bit']])
322 self.add_bits_pos(1, self.old_gap_end, self.last_samplenum)
324 self.old_gap_start = self.last_samplenum
325 self.old_gap_end = self.samplenum
329 self.oldsamplenum = self.samplenum
330 self.last_samplenum = self.samplenum